diff options
| author | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-08-24 13:20:31 -0700 |
|---|---|---|
| committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-08-24 13:20:31 -0700 |
| commit | 8572d8fd9190884dc70e9db60f80e4778f65c44b (patch) | |
| tree | f7077d1443edbf51d0279df6b9c16ce5e95f8238 /configs/ruby | |
| parent | e983ef9e8c6749c1cd0bf083a2092cb4683d0346 (diff) | |
| download | gem5-8572d8fd9190884dc70e9db60f80e4778f65c44b.tar.xz | |
config: fixed ruby dma device connections
Diffstat (limited to 'configs/ruby')
| -rw-r--r-- | configs/ruby/MESI_CMP_directory.py | 5 | ||||
| -rw-r--r-- | configs/ruby/MOESI_CMP_directory.py | 5 | ||||
| -rw-r--r-- | configs/ruby/MOESI_CMP_token.py | 5 |
3 files changed, 6 insertions, 9 deletions
diff --git a/configs/ruby/MESI_CMP_directory.py b/configs/ruby/MESI_CMP_directory.py index f6dafa44a..91a76497e 100644 --- a/configs/ruby/MESI_CMP_directory.py +++ b/configs/ruby/MESI_CMP_directory.py @@ -151,12 +151,11 @@ def create_system(options, system, piobus, dma_devices): dma_cntrl = DMA_Controller(version = i, dma_sequencer = dma_seq) - dma_cntrl.dma_sequencer.port = dma_device.dma exec("system.dma_cntrl%d = dma_cntrl" % i) if dma_device.type == 'MemTest': - system.dma_cntrl.dma_sequencer.port = dma_device.test + exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i) else: - system.dma_cntrl.dma_sequencer.port = dma_device.dma + exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i) dma_cntrl_nodes.append(dma_cntrl) all_cntrls = l1_cntrl_nodes + \ diff --git a/configs/ruby/MOESI_CMP_directory.py b/configs/ruby/MOESI_CMP_directory.py index 4498617a9..11b65c397 100644 --- a/configs/ruby/MOESI_CMP_directory.py +++ b/configs/ruby/MOESI_CMP_directory.py @@ -152,10 +152,9 @@ def create_system(options, system, piobus, dma_devices): exec("system.dma_cntrl%d = dma_cntrl" % i) if dma_device.type == 'MemTest': - system.dma_cntrl.dma_sequencer.port = dma_device.test + exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i) else: - system.dma_cntrl.dma_sequencer.port = dma_device.dma - dma_cntrl.dma_sequencer.port = dma_device.dma + exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i) dma_cntrl_nodes.append(dma_cntrl) all_cntrls = l1_cntrl_nodes + \ diff --git a/configs/ruby/MOESI_CMP_token.py b/configs/ruby/MOESI_CMP_token.py index ba61c727a..1e1190cae 100644 --- a/configs/ruby/MOESI_CMP_token.py +++ b/configs/ruby/MOESI_CMP_token.py @@ -178,10 +178,9 @@ def create_system(options, system, piobus, dma_devices): exec("system.dma_cntrl%d = dma_cntrl" % i) if dma_device.type == 'MemTest': - system.dma_cntrl.dma_sequencer.port = dma_device.test + exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i) else: - system.dma_cntrl.dma_sequencer.port = dma_device.dma - dma_cntrl.dma_sequencer.port = dma_device.dma + exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i) dma_cntrl_nodes.append(dma_cntrl) all_cntrls = l1_cntrl_nodes + \ |