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| author | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-03-21 21:22:20 -0700 |
|---|---|---|
| committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-03-21 21:22:20 -0700 |
| commit | 91b0c5487bcf0259eab25baef686fbef83adae1a (patch) | |
| tree | f03b7fe4632405141db83afc5357766ab466ec3b /configs/ruby | |
| parent | d8e1e5abd0a560dfeb061f430bb2470a818ae5b0 (diff) | |
| download | gem5-91b0c5487bcf0259eab25baef686fbef83adae1a.tar.xz | |
ruby: Python config files now sets a unique id for each sequencer
Diffstat (limited to 'configs/ruby')
| -rw-r--r-- | configs/ruby/MESI_CMP_directory.py | 3 | ||||
| -rw-r--r-- | configs/ruby/MI_example.py | 3 | ||||
| -rw-r--r-- | configs/ruby/MOESI_CMP_directory.py | 3 | ||||
| -rw-r--r-- | configs/ruby/MOESI_CMP_token.py | 3 | ||||
| -rw-r--r-- | configs/ruby/MOESI_hammer.py | 3 |
5 files changed, 10 insertions, 5 deletions
diff --git a/configs/ruby/MESI_CMP_directory.py b/configs/ruby/MESI_CMP_directory.py index 8ae2be2fa..ca5a7aa46 100644 --- a/configs/ruby/MESI_CMP_directory.py +++ b/configs/ruby/MESI_CMP_directory.py @@ -76,7 +76,8 @@ def create_system(options, phys_mem, piobus, dma_devices): l1d_cache = L1Cache(size = options.l1d_size, assoc = options.l1d_assoc) - cpu_seq = RubySequencer(icache = l1i_cache, + cpu_seq = RubySequencer(version = i, + icache = l1i_cache, dcache = l1d_cache, physMemPort = phys_mem.port, physmem = phys_mem) diff --git a/configs/ruby/MI_example.py b/configs/ruby/MI_example.py index 971a52dc8..96515971e 100644 --- a/configs/ruby/MI_example.py +++ b/configs/ruby/MI_example.py @@ -71,7 +71,8 @@ def create_system(options, phys_mem, piobus, dma_devices): # # Only one unified L1 cache exists. Can cache instructions and data. # - cpu_seq = RubySequencer(icache = cache, + cpu_seq = RubySequencer(version = i, + icache = cache, dcache = cache, physMemPort = phys_mem.port, physmem = phys_mem) diff --git a/configs/ruby/MOESI_CMP_directory.py b/configs/ruby/MOESI_CMP_directory.py index 6e248573d..1cdb6c522 100644 --- a/configs/ruby/MOESI_CMP_directory.py +++ b/configs/ruby/MOESI_CMP_directory.py @@ -76,7 +76,8 @@ def create_system(options, phys_mem, piobus, dma_devices): l1d_cache = L1Cache(size = options.l1d_size, assoc = options.l1d_assoc) - cpu_seq = RubySequencer(icache = l1i_cache, + cpu_seq = RubySequencer(version = i, + icache = l1i_cache, dcache = l1d_cache, physMemPort = phys_mem.port, physmem = phys_mem) diff --git a/configs/ruby/MOESI_CMP_token.py b/configs/ruby/MOESI_CMP_token.py index 8d7f7a354..849d5b62a 100644 --- a/configs/ruby/MOESI_CMP_token.py +++ b/configs/ruby/MOESI_CMP_token.py @@ -82,7 +82,8 @@ def create_system(options, phys_mem, piobus, dma_devices): l1d_cache = L1Cache(size = options.l1d_size, assoc = options.l1d_assoc) - cpu_seq = RubySequencer(icache = l1i_cache, + cpu_seq = RubySequencer(version = i, + icache = l1i_cache, dcache = l1d_cache, physMemPort = phys_mem.port, physmem = phys_mem) diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py index 62d86a1e2..17fcefb56 100644 --- a/configs/ruby/MOESI_hammer.py +++ b/configs/ruby/MOESI_hammer.py @@ -77,7 +77,8 @@ def create_system(options, phys_mem, piobus, dma_devices): l2_cache = L2Cache(size = options.l2_size, assoc = options.l2_assoc) - cpu_seq = RubySequencer(icache = l1i_cache, + cpu_seq = RubySequencer(version = i, + icache = l1i_cache, dcache = l1d_cache, physMemPort = phys_mem.port, physmem = phys_mem) |