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| author | Korey Sewell <ksewell@umich.edu> | 2006-07-07 15:58:22 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2006-07-07 15:58:22 -0400 |
| commit | 743737c28b4d29d2b6c1a80fc14e5bc6abcf6a60 (patch) | |
| tree | 898724a3714840ead898bd274c594566403fbf4d /configs/test/test.py | |
| parent | 74d4d671386252d0d5f570b69fc63cb332757580 (diff) | |
| parent | 76c110d924d2adfa209ad4302af791dfe6f67946 (diff) | |
| download | gem5-743737c28b4d29d2b6c1a80fc14e5bc6abcf6a60.tar.xz | |
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
into zizzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-o3
--HG--
extra : convert_revision : f97469b7d19c82deb3d068f80546d729757c25e3
Diffstat (limited to 'configs/test/test.py')
| -rw-r--r-- | configs/test/test.py | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/configs/test/test.py b/configs/test/test.py index 625304a08..e7b0971ef 100644 --- a/configs/test/test.py +++ b/configs/test/test.py @@ -75,6 +75,8 @@ else: cpu = AtomicSimpleCPU() cpu.workload = process cpu.mem = magicbus +cpu.icache_port=magicbus.port +cpu.dcache_port=magicbus.port system = System(physmem = mem, cpu = cpu) mem.port = magicbus.port |