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author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-06-13 23:19:28 -0400 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-06-13 23:19:28 -0400 |
commit | e981a97dec3df921f3800fd9ae5ec01ed4e9d2b1 (patch) | |
tree | afca175c8609437088ebb8ca6635134b87e6cf32 /configs/test/test.py | |
parent | 285b88a57b0111cc6698f2e30182dca17d8ea15a (diff) | |
download | gem5-e981a97dec3df921f3800fd9ae5ec01ed4e9d2b1.tar.xz |
Move SimObject creation and Port connection loops
into Python.
Add Port and VectorPort objects and support for
specifying port connections via assignment.
The whole C++ ConfigNode hierarchy is gone now, as are
C++ Connector objects.
configs/test/fs.py:
configs/test/test.py:
Rewrite for new port connector syntax.
src/SConscript:
Remove unneeded files:
- mem/connector.*
- sim/config*
src/dev/io_device.hh:
src/mem/bridge.cc:
src/mem/bridge.hh:
src/mem/bus.cc:
src/mem/bus.hh:
src/mem/mem_object.hh:
src/mem/physical.cc:
src/mem/physical.hh:
Allow getPort() to take an optional index to
support vector ports (eventually).
src/python/m5/__init__.py:
Move SimObject construction and port connection
operations into Python (with C++ calls).
src/python/m5/config.py:
Move SimObject construction and port connection
operations into Python (with C++ calls).
Add support for declaring and connecting MemObject
ports in Python.
src/python/m5/objects/Bus.py:
src/python/m5/objects/PhysicalMemory.py:
Add port declaration.
src/sim/builder.cc:
src/sim/builder.hh:
src/sim/serialize.cc:
src/sim/serialize.hh:
ConfigNodes are gone; builder just gets the
name of a .ini file section now.
src/sim/main.cc:
Move SimObject construction and port connection
operations into Python (with C++ calls).
Split remaining initialization operations into two parts,
loadIniFile() and finalInit().
src/sim/param.cc:
src/sim/param.hh:
SimObject resolution done globally in Python now
(not via ConfigNode hierarchy).
src/sim/sim_object.cc:
Remove unneeded #include.
--HG--
extra : convert_revision : 2fa4001eaaec0c9a4231ef6e854f8e156d930dfe
Diffstat (limited to 'configs/test/test.py')
-rw-r--r-- | configs/test/test.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/test/test.py b/configs/test/test.py index 2ece9e675..ae85af112 100644 --- a/configs/test/test.py +++ b/configs/test/test.py @@ -41,7 +41,7 @@ cpu.workload = process cpu.mem = magicbus system = System(physmem = mem, cpu = cpu) -system.c1 = Connector(side_a = mem, side_b = magicbus) +mem.port = magicbus.port root = Root(system = system) # instantiate configuration |