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| author | Ali Saidi <saidi@eecs.umich.edu> | 2006-07-06 14:41:01 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2006-07-06 14:41:01 -0400 |
| commit | 93839380e7dc4799d234843d10329c03d38487fa (patch) | |
| tree | 329e2bec6de1adb82ab5d756fded897363b998dc /configs/test | |
| parent | 4201ec84b2dd7d96148bf661124dd7b5d0e7204b (diff) | |
| download | gem5-93839380e7dc4799d234843d10329c03d38487fa.tar.xz | |
Add default responder to bus
Update configuration for new default responder on bus
Update to devices to handle their own pci config space without pciconfigall
Remove most of pciconfigall, it now is a dumbdevice which gets it's address based on the bus it's supposed to respond for
Remove need for pci config space from platform, add registerPciDevice function to prevent more than one device from having same
bus:dev:func and interrupt
Remove pciconfigspace from pci devices, and py files
Add calcConfigAddr that returns address for config space based on bus/dev/function + offset
configs/test/fs.py:
Update configuration for new default responder on bus
src/dev/ide_ctrl.cc:
src/dev/ide_ctrl.hh:
src/dev/ns_gige.cc:
src/dev/ns_gige.hh:
src/dev/pcidev.cc:
src/dev/pcidev.hh:
Update to handle it's own pci config space without pciconfigall
src/dev/io_device.cc:
src/dev/io_device.hh:
change naming for pio port
break out recvTiming into two functions to reuse code
src/dev/pciconfigall.cc:
src/dev/pciconfigall.hh:
removing most of pciconfigall, it now is a dumbdevice which gets it's address based on the bus it's supposed to respond for
src/dev/pcireg.h:
add a max size for PCI config space (per PCI spec)
src/dev/platform.cc:
src/dev/platform.hh:
remove need for pci config space from platform, add registerPciDevice function to prevent more than one device from having same
bus:dev:func and interrupt
src/dev/sinic.cc:
remove pciconfigspace as it's no longer a needed parameter
src/dev/tsunami.cc:
src/dev/tsunami.hh:
src/dev/tsunami_pchip.cc:
src/dev/tsunami_pchip.hh:
add calcConfigAddr that returns address for config space based on bus/dev/function + offset (per PCI spec)
src/mem/bus.cc:
src/mem/bus.hh:
src/python/m5/objects/Bus.py:
add idea of default responder to bus
src/python/m5/objects/Pci.py:
add config port for pci devices
add latency, bus and size parameters for pci config all (min is 8MB, max is 256MB see pci spec)
--HG--
extra : convert_revision : 99db43b0a3a077f86611d6eaff6664a3885da7c9
Diffstat (limited to 'configs/test')
| -rw-r--r-- | configs/test/fs.py | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/configs/test/fs.py b/configs/test/fs.py index aa530dd55..e0dd38e41 100644 --- a/configs/test/fs.py +++ b/configs/test/fs.py @@ -1,6 +1,6 @@ import m5 from m5.objects import * -import os +import os,optparse,sys from SysPaths import * parser = optparse.OptionParser(option_list=m5.standardOptions) @@ -98,7 +98,7 @@ class SpecwebFilesetDisk(IdeDisk): class BaseTsunami(Tsunami): cchip = TsunamiCChip(pio_addr=0x801a0000000) pchip = TsunamiPChip(pio_addr=0x80180000000) - pciconfig = PciConfigAll(pio_addr=0x801fe000000) + pciconfig = PciConfigAll() fake_sm_chip = IsaFake(pio_addr=0x801fc000370) fake_uart1 = IsaFake(pio_addr=0x801fc0002f8) @@ -151,16 +151,18 @@ class MyLinuxAlphaSystem(LinuxAlphaSystem): tsunami = LinuxTsunami() tsunami.cchip.pio = magicbus.port tsunami.pchip.pio = magicbus.port - tsunami.pciconfig.pio = magicbus.port + tsunami.pciconfig.pio = magicbus.default tsunami.fake_sm_chip.pio = magicbus.port tsunami.ethernet.pio = magicbus.port tsunami.ethernet.dma = magicbus.port + tsunami.ethernet.config = magicbus.port tsunami.fake_uart1.pio = magicbus.port tsunami.fake_uart2.pio = magicbus.port tsunami.fake_uart3.pio = magicbus.port tsunami.fake_uart4.pio = magicbus.port tsunami.ide.pio = magicbus.port tsunami.ide.dma = magicbus.port + tsunami.ide.config = magicbus.port tsunami.fake_ppc.pio = magicbus.port tsunami.fake_OROM.pio = magicbus.port tsunami.fake_pnp_addr.pio = magicbus.port |