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authorAndreas Hansson <andreas.hansson@arm.com>2015-07-03 10:14:41 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2015-07-03 10:14:41 -0400
commit71856cfbbcac94997839ac7831b3ac4b2ddf29a2 (patch)
treef4f6a3af3efca446c09b0c8898649d5622f649eb /configs/topologies
parent0ddde83a47e8a129de1a5c00475772c6ac0fd004 (diff)
downloadgem5-71856cfbbcac94997839ac7831b3ac4b2ddf29a2.tar.xz
mem: Split WriteInvalidateReq into write and invalidate
WriteInvalidateReq ensures that a whole-line write does not incur the cost of first doing a read exclusive, only to later overwrite the data. This patch splits the existing WriteInvalidateReq into a WriteLineReq, which is done locally, and an InvalidateReq that is sent out throughout the memory system. The WriteLineReq re-uses the normal WriteResp. The change allows us to better express the difference between the cache that is performing the write, and the ones that are merely invalidating. As a consequence, we no longer have to rely on the isTopLevel flag. Moreover, the actual memory in the system does not see the intitial write, only the writeback. We were marking the written line as dirty already, so there is really no need to also push the write all the way to the memory. The overall flow of the write-invalidate operation remains the same, i.e. the operation is only carried out once the response for the invalidate comes back. This patch adds the InvalidateResp for this very reason.
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