diff options
| author | Nilay Vaish <nilay@cs.wisc.edu> | 2011-07-26 12:20:22 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2011-07-26 12:20:22 -0500 |
| commit | 00ad4eb8ce997466e1d537b0f0a3911de7842b4c (patch) | |
| tree | 9de2207fac270113701e292a76c946d3d2dfc179 /configs | |
| parent | fb1f3bae1b35687cd98ec06c9fc291a88b1e546d (diff) | |
| download | gem5-00ad4eb8ce997466e1d537b0f0a3911de7842b4c.tar.xz | |
Ruby: Fix instantiations of DMA controller and sequencer
The patch on Ruby functional accesses made changes to the process of
instantiating controllers and sequencers. The DMA controller and
sequencer was not updated, hence this patch.
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/ruby/MESI_CMP_directory.py | 6 | ||||
| -rw-r--r-- | configs/ruby/MI_example.py | 6 | ||||
| -rw-r--r-- | configs/ruby/MOESI_CMP_directory.py | 6 | ||||
| -rw-r--r-- | configs/ruby/MOESI_CMP_token.py | 6 | ||||
| -rw-r--r-- | configs/ruby/MOESI_hammer.py | 6 |
5 files changed, 20 insertions, 10 deletions
diff --git a/configs/ruby/MESI_CMP_directory.py b/configs/ruby/MESI_CMP_directory.py index fdb6ce0b0..6e70944b7 100644 --- a/configs/ruby/MESI_CMP_directory.py +++ b/configs/ruby/MESI_CMP_directory.py @@ -166,11 +166,13 @@ def create_system(options, system, piobus, dma_devices, ruby_system): # dma_seq = DMASequencer(version = i, physMemPort = system.physmem.port, - physmem = system.physmem) + physmem = system.physmem, + ruby_system = ruby_system) dma_cntrl = DMA_Controller(version = i, cntrl_id = cntrl_count, - dma_sequencer = dma_seq) + dma_sequencer = dma_seq, + ruby_system = ruby_system) exec("system.dma_cntrl%d = dma_cntrl" % i) if dma_device.type == 'MemTest': diff --git a/configs/ruby/MI_example.py b/configs/ruby/MI_example.py index fcee35f00..eeb81e8a3 100644 --- a/configs/ruby/MI_example.py +++ b/configs/ruby/MI_example.py @@ -141,11 +141,13 @@ def create_system(options, system, piobus, dma_devices, ruby_system): # dma_seq = DMASequencer(version = i, physMemPort = system.physmem.port, - physmem = system.physmem) + physmem = system.physmem, + ruby_system = ruby_system) dma_cntrl = DMA_Controller(version = i, cntrl_id = cntrl_count, - dma_sequencer = dma_seq) + dma_sequencer = dma_seq, + ruby_system = ruby_system) exec("system.dma_cntrl%d = dma_cntrl" % i) if dma_device.type == 'MemTest': diff --git a/configs/ruby/MOESI_CMP_directory.py b/configs/ruby/MOESI_CMP_directory.py index 5da1cf310..e3bc9ae85 100644 --- a/configs/ruby/MOESI_CMP_directory.py +++ b/configs/ruby/MOESI_CMP_directory.py @@ -165,11 +165,13 @@ def create_system(options, system, piobus, dma_devices, ruby_system): # dma_seq = DMASequencer(version = i, physMemPort = system.physmem.port, - physmem = system.physmem) + physmem = system.physmem, + ruby_system = ruby_system) dma_cntrl = DMA_Controller(version = i, cntrl_id = cntrl_count, - dma_sequencer = dma_seq) + dma_sequencer = dma_seq, + ruby_system = ruby_system) exec("system.dma_cntrl%d = dma_cntrl" % i) if dma_device.type == 'MemTest': diff --git a/configs/ruby/MOESI_CMP_token.py b/configs/ruby/MOESI_CMP_token.py index c7f9dda11..d11bb320c 100644 --- a/configs/ruby/MOESI_CMP_token.py +++ b/configs/ruby/MOESI_CMP_token.py @@ -189,11 +189,13 @@ def create_system(options, system, piobus, dma_devices, ruby_system): # dma_seq = DMASequencer(version = i, physMemPort = system.physmem.port, - physmem = system.physmem) + physmem = system.physmem, + ruby_system = ruby_system) dma_cntrl = DMA_Controller(version = i, cntrl_id = cntrl_count, - dma_sequencer = dma_seq) + dma_sequencer = dma_seq, + ruby_system = ruby_system) exec("system.dma_cntrl%d = dma_cntrl" % i) if dma_device.type == 'MemTest': diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py index 6e46f3e0f..fb755ba55 100644 --- a/configs/ruby/MOESI_hammer.py +++ b/configs/ruby/MOESI_hammer.py @@ -200,11 +200,13 @@ def create_system(options, system, piobus, dma_devices, ruby_system): # dma_seq = DMASequencer(version = i, physMemPort = system.physmem.port, - physmem = system.physmem) + physmem = system.physmem, + ruby_system = ruby_system) dma_cntrl = DMA_Controller(version = i, cntrl_id = cntrl_count, - dma_sequencer = dma_seq) + dma_sequencer = dma_seq, + ruby_system = ruby_system) exec("system.dma_cntrl%d = dma_cntrl" % i) if dma_device.type == 'MemTest': |