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| author | Austin Harris <austinharris@utexas.edu> | 2017-12-02 17:03:28 -0600 |
|---|---|---|
| committer | Austin Harris <austin.dane.harris@gmail.com> | 2017-12-12 02:11:28 +0000 |
| commit | a51576e19c7f63930bc3b59c9a2e0a49cbc0bd81 (patch) | |
| tree | fd9afdbbc7114e5bc95494db1e6612b2a7c01e90 /configs | |
| parent | 5b1704094c3949ac91074bc61c0381b74ba53135 (diff) | |
| download | gem5-a51576e19c7f63930bc3b59c9a2e0a49cbc0bd81.tar.xz | |
config: Fix need to set ISA of switch cpus.
Since BaseCPU.createThreads() no longer overrides the BaseCPU.isa
parameter, switch_cpus should have the ISA copied. This fixes a
fatal error in BaseCPU when restoring from a checkpoint.
Change-Id: I4fdcacb76da46bdbe1ce37dcf05c5a6a8a9e5237
Signed-off-by: Austin Harris <austinharris@utexas.edu>
Reviewed-on: https://gem5-review.googlesource.com/6241
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/common/Simulation.py | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py index c4d5c9644..71a982af9 100644 --- a/configs/common/Simulation.py +++ b/configs/common/Simulation.py @@ -464,6 +464,7 @@ def run(options, root, testsys, cpu_class): switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain switch_cpus[i].progress_interval = \ testsys.cpu[i].progress_interval + switch_cpus[i].isa = testsys.cpu[i].isa # simulation period if options.maxinsts: switch_cpus[i].max_insts_any_thread = options.maxinsts @@ -496,6 +497,7 @@ def run(options, root, testsys, cpu_class): repeat_switch_cpus[i].system = testsys repeat_switch_cpus[i].workload = testsys.cpu[i].workload repeat_switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain + repeat_switch_cpus[i].isa = testsys.cpu[i].isa if options.maxinsts: repeat_switch_cpus[i].max_insts_any_thread = options.maxinsts @@ -525,6 +527,8 @@ def run(options, root, testsys, cpu_class): switch_cpus_1[i].workload = testsys.cpu[i].workload switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain switch_cpus_1[i].clk_domain = testsys.cpu[i].clk_domain + switch_cpus[i].isa = testsys.cpu[i].isa + switch_cpus_1[i].isa = testsys.cpu[i].isa # if restoring, make atomic cpu simulate only a few instructions if options.checkpoint_restore != None: |