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authorNikos Nikoleris <nikos.nikoleris@arm.com>2017-04-04 19:19:02 +0100
committerNikos Nikoleris <nikos.nikoleris@arm.com>2017-06-13 15:53:44 +0000
commit42e114ddefe2fbf56e7da3daccf2cfbe128242a6 (patch)
tree0768f3383f84920e7722816e194342386d252c78 /configs
parent12db50c89584938839e035da47d206250cbfd7c2 (diff)
downloadgem5-42e114ddefe2fbf56e7da3daccf2cfbe128242a6.tar.xz
ruby, arm: Forward invalidations to the local exclusive monitor
ARM systems require local exclusive monitors for the implementation of synchronization primitives between processors. A ruby memory system needs to forward invalidations to the local exclusive monitors to to correctly determine their state. Change-Id: I7bc4d0f2a5be0f4e36a25c87aa4a81a3f086fb3c Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2904 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'configs')
-rw-r--r--configs/ruby/Ruby.py4
1 files changed, 3 insertions, 1 deletions
diff --git a/configs/ruby/Ruby.py b/configs/ruby/Ruby.py
index 71f6eef7c..04eda5a39 100644
--- a/configs/ruby/Ruby.py
+++ b/configs/ruby/Ruby.py
@@ -231,6 +231,8 @@ def send_evicts(options):
# currently, 2 scenarios warrant forwarding evictions to the CPU:
# 1. The O3 model must keep the LSQ coherent with the caches
# 2. The x86 mwait instruction is built on top of coherence invalidations
- if options.cpu_type == "DerivO3CPU" or buildEnv['TARGET_ISA'] == 'x86':
+ # 3. The local exclusive monitor in ARM systems
+ if options.cpu_type == "DerivO3CPU" or \
+ buildEnv['TARGET_ISA'] in ('x86', 'arm'):
return True
return False