diff options
| author | Malek Musleh <malek.musleh@gmail.com> | 2012-10-27 16:04:30 -0500 |
|---|---|---|
| committer | Malek Musleh <malek.musleh@gmail.com> | 2012-10-27 16:04:30 -0500 |
| commit | d2d431f43940cd5b06aa2c6406afcb7cbab789f3 (patch) | |
| tree | a54b4e7d28c069ba004a88a7577a2df175759a3e /configs | |
| parent | 931ec6b7ccac5978c13c1ec9283d23f51085ddab (diff) | |
| download | gem5-d2d431f43940cd5b06aa2c6406afcb7cbab789f3.tar.xz | |
ruby: set the is_icache param for caches
This patch sets the is_icache param for the L1 caches used in
the MESI and the MOESI CMP directory protocols.
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/ruby/MESI_CMP_directory.py | 6 | ||||
| -rw-r--r-- | configs/ruby/MOESI_CMP_directory.py | 6 |
2 files changed, 8 insertions, 4 deletions
diff --git a/configs/ruby/MESI_CMP_directory.py b/configs/ruby/MESI_CMP_directory.py index 35f857534..6694223cf 100644 --- a/configs/ruby/MESI_CMP_directory.py +++ b/configs/ruby/MESI_CMP_directory.py @@ -80,10 +80,12 @@ def create_system(options, system, piobus, dma_ports, ruby_system): # l1i_cache = L1Cache(size = options.l1i_size, assoc = options.l1i_assoc, - start_index_bit = block_size_bits) + start_index_bit = block_size_bits, + is_icache = True) l1d_cache = L1Cache(size = options.l1d_size, assoc = options.l1d_assoc, - start_index_bit = block_size_bits) + start_index_bit = block_size_bits, + is_icache = False) l1_cntrl = L1Cache_Controller(version = i, cntrl_id = cntrl_count, diff --git a/configs/ruby/MOESI_CMP_directory.py b/configs/ruby/MOESI_CMP_directory.py index dbe814977..3a69b657e 100644 --- a/configs/ruby/MOESI_CMP_directory.py +++ b/configs/ruby/MOESI_CMP_directory.py @@ -80,10 +80,12 @@ def create_system(options, system, piobus, dma_ports, ruby_system): # l1i_cache = L1Cache(size = options.l1i_size, assoc = options.l1i_assoc, - start_index_bit = block_size_bits) + start_index_bit = block_size_bits, + is_icache = True) l1d_cache = L1Cache(size = options.l1d_size, assoc = options.l1d_assoc, - start_index_bit = block_size_bits) + start_index_bit = block_size_bits, + is_icache = False) l1_cntrl = L1Cache_Controller(version = i, cntrl_id = cntrl_count, |