summaryrefslogtreecommitdiff
path: root/configs
diff options
context:
space:
mode:
authorAndreas Sandberg <Andreas.Sandberg@ARM.com>2013-01-07 13:05:45 -0500
committerAndreas Sandberg <Andreas.Sandberg@ARM.com>2013-01-07 13:05:45 -0500
commit2cfe62adc4f9206f616669a103133b906f705e8b (patch)
tree8dc7c3253a50302aecd990182f562c779cf02b85 /configs
parentf7da0fddd1506c9fe2325c1720bf08635ac7db05 (diff)
downloadgem5-2cfe62adc4f9206f616669a103133b906f705e8b.tar.xz
cpu: Rename defer_registration->switched_out
The defer_registration parameter is used to prevent a CPU from initializing at startup, leaving it in the "switched out" mode. The name of this parameter (and the help string) is confusing. This patch renames it to switched_out, which should be more descriptive.
Diffstat (limited to 'configs')
-rw-r--r--configs/common/O3_ARM_v7a.py2
-rw-r--r--configs/common/Simulation.py14
2 files changed, 8 insertions, 8 deletions
diff --git a/configs/common/O3_ARM_v7a.py b/configs/common/O3_ARM_v7a.py
index 2c640badb..f76128ae6 100644
--- a/configs/common/O3_ARM_v7a.py
+++ b/configs/common/O3_ARM_v7a.py
@@ -141,7 +141,7 @@ class O3_ARM_v7a_3(DerivO3CPU):
numIQEntries = 32
numROBEntries = 40
- defer_registration= False
+ switched_out = False
# Instruction Cache
class O3_ARM_v7a_ICache(BaseCache):
diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py
index 53ccf0a14..ea5949efc 100644
--- a/configs/common/Simulation.py
+++ b/configs/common/Simulation.py
@@ -296,7 +296,7 @@ def run(options, root, testsys, cpu_class):
testsys.cpu[i].max_insts_any_thread = options.maxinsts
if cpu_class:
- switch_cpus = [cpu_class(defer_registration=True, cpu_id=(i))
+ switch_cpus = [cpu_class(switched_out=True, cpu_id=(i))
for i in xrange(np)]
for i in xrange(np):
@@ -321,23 +321,23 @@ def run(options, root, testsys, cpu_class):
print "O3 CPU must be used with caches"
sys.exit(1)
- repeat_switch_cpus = [O3_ARM_v7a_3(defer_registration=True, \
+ repeat_switch_cpus = [O3_ARM_v7a_3(switched_out=True, \
cpu_id=(i)) for i in xrange(np)]
elif options.cpu_type == "detailed":
if not options.caches:
print "O3 CPU must be used with caches"
sys.exit(1)
- repeat_switch_cpus = [DerivO3CPU(defer_registration=True, \
+ repeat_switch_cpus = [DerivO3CPU(switched_out=True, \
cpu_id=(i)) for i in xrange(np)]
elif options.cpu_type == "inorder":
print "inorder CPU switching not supported"
sys.exit(1)
elif options.cpu_type == "timing":
- repeat_switch_cpus = [TimingSimpleCPU(defer_registration=True, \
+ repeat_switch_cpus = [TimingSimpleCPU(switched_out=True, \
cpu_id=(i)) for i in xrange(np)]
else:
- repeat_switch_cpus = [AtomicSimpleCPU(defer_registration=True, \
+ repeat_switch_cpus = [AtomicSimpleCPU(switched_out=True, \
cpu_id=(i)) for i in xrange(np)]
for i in xrange(np):
@@ -361,9 +361,9 @@ def run(options, root, testsys, cpu_class):
for i in xrange(np)]
if options.standard_switch:
- switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(i))
+ switch_cpus = [TimingSimpleCPU(switched_out=True, cpu_id=(i))
for i in xrange(np)]
- switch_cpus_1 = [DerivO3CPU(defer_registration=True, cpu_id=(i))
+ switch_cpus_1 = [DerivO3CPU(switched_out=True, cpu_id=(i))
for i in xrange(np)]
for i in xrange(np):