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authorMitch Hayenga <mitch.hayenga@arm.com>2015-09-30 11:14:19 -0500
committerMitch Hayenga <mitch.hayenga@arm.com>2015-09-30 11:14:19 -0500
commit582a0148b441fe9f4a6f977094c5ce6bf7ab6313 (patch)
treedc2a54ead2b5f7b8e521cfb49b28dc054088b17a /configs
parent52d521e4337995d417b6f7b68644959edcc0c6b4 (diff)
downloadgem5-582a0148b441fe9f4a6f977094c5ce6bf7ab6313.tar.xz
config,cpu: Add SMT support to Atomic and Timing CPUs
Adds SMT support to the "simple" CPU models so that they can be used with other SMT-supported CPUs. Example usage: this enables the TimingSimpleCPU to be used to warmup caches before swapping to detailed mode with the in-order or out-of-order based CPU models.
Diffstat (limited to 'configs')
-rw-r--r--configs/example/se.py3
1 files changed, 3 insertions, 0 deletions
diff --git a/configs/example/se.py b/configs/example/se.py
index f0e84e69d..afd916cdb 100644
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -178,6 +178,9 @@ system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)],
mem_ranges = [AddrRange(options.mem_size)],
cache_line_size = options.cacheline_size)
+if numThreads > 1:
+ system.multi_thread = True
+
# Create a top-level voltage domain
system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)