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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2014-11-06 05:42:21 -0600 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2014-11-06 05:42:21 -0600 |
| commit | 0811f21f67493a77b0c5a69260715d7cce7341e7 (patch) | |
| tree | a2d5bd98ccb5fa17637ff791f66184d220e0e341 /configs | |
| parent | 3022d463fbe1f969aadf7284ade996539c9454f9 (diff) | |
| download | gem5-0811f21f67493a77b0c5a69260715d7cce7341e7.tar.xz | |
ruby: provide a backing store
Ruby's functional accesses are not guaranteed to succeed as of now. While
this is not a problem for the protocols that are currently in the mainline
repo, it seems that coherence protocols for gpus rely on a backing store to
supply the correct data. The aim of this patch is to make this backing store
configurable i.e. it comes into play only when a particular option:
--access-backing-store is invoked.
The backing store has been there since M5 and GEMS were integrated. The only
difference is that earlier the system used to maintain the backing store and
ruby's copy was write-only. Sometime last year, we moved to data being
supplied supplied by ruby in SE mode simulations. And now we have patches on
the reviewboard, which remove ruby's copy of memory altogether and rely
completely on the system's memory to supply data. This patch adds back a
SimpleMemory member to RubySystem. This member is used only if the option:
access-backing-store is set to true. By default, the memory would not be
accessed.
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/ruby/Ruby.py | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/configs/ruby/Ruby.py b/configs/ruby/Ruby.py index 35ff66a0c..b99e251d3 100644 --- a/configs/ruby/Ruby.py +++ b/configs/ruby/Ruby.py @@ -56,6 +56,9 @@ def define_options(parser): default='2GHz', help="Clock for blocks running at Ruby system's speed") + parser.add_option("--access-backing-store", action="store_true", default=False, + help="Should ruby maintain a second copy of memory") + # Options related to cache structure parser.add_option("--ports", action="store", type="int", default=4, help="used of transitions per cycle which is a proxy \ @@ -229,3 +232,8 @@ def create_system(options, full_system, system, piobus = None, dma_ports = []): ruby._cpu_ports = cpu_sequencers ruby.num_of_sequencers = len(cpu_sequencers) ruby.random_seed = options.random_seed + + # Create a backing copy of physical memory in case required + if options.access_backing_store: + ruby.phys_mem = SimpleMemory(range=AddrRange(options.mem_size), + in_addr_map=False) |