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authorNilay Vaish <nilay@cs.wisc.edu>2011-07-25 18:18:31 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2011-07-25 18:18:31 -0500
commitca247a81f0cf42e3ab3d56adc0100c1715ce3d72 (patch)
tree9ef133319da5f40814d63539f0a058923666fc5d /configs
parent145deb7c88e38d84a747c1984d772218d527b529 (diff)
downloadgem5-ca247a81f0cf42e3ab3d56adc0100c1715ce3d72.tar.xz
Ruby: Fix dma controller configs/ruby/MI_example.py
The dma controller in configs/ruby/MI_example.py was not being set correctly. This patch fixes it.
Diffstat (limited to 'configs')
-rw-r--r--configs/ruby/MI_example.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/configs/ruby/MI_example.py b/configs/ruby/MI_example.py
index 4ea5e5993..fcee35f00 100644
--- a/configs/ruby/MI_example.py
+++ b/configs/ruby/MI_example.py
@@ -149,9 +149,9 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
exec("system.dma_cntrl%d = dma_cntrl" % i)
if dma_device.type == 'MemTest':
- system.dma_cntrl.dma_sequencer.port = dma_device.test
+ exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i)
else:
- system.dma_cntrl.dma_sequencer.port = dma_device.dma
+ exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i)
dma_cntrl.dma_sequencer.port = dma_device.dma
dma_cntrl_nodes.append(dma_cntrl)