summaryrefslogtreecommitdiff
path: root/configs
diff options
context:
space:
mode:
authorNilay Vaish <nilay@cs.wisc.edu>2015-01-03 17:51:48 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2015-01-03 17:51:48 -0600
commit1ee70e9d84b769b736348e1f7709bc8ede344ec2 (patch)
tree1e4171446208c209f53bd65d188b1610036998dc /configs
parent642b9b4fab0fcba77ed4bc596c4adc92ae0f13c3 (diff)
downloadgem5-1ee70e9d84b769b736348e1f7709bc8ede344ec2.tar.xz
configs: ruby: removes bug introduced by 05b5a6cf3521
Diffstat (limited to 'configs')
-rw-r--r--configs/ruby/Ruby.py10
1 files changed, 5 insertions, 5 deletions
diff --git a/configs/ruby/Ruby.py b/configs/ruby/Ruby.py
index 44d6bdfcc..c3a61e7d1 100644
--- a/configs/ruby/Ruby.py
+++ b/configs/ruby/Ruby.py
@@ -233,6 +233,11 @@ def create_system(options, full_system, system, piobus = None, dma_ports = []):
ruby.num_of_sequencers = len(cpu_sequencers)
ruby.random_seed = options.random_seed
+ # Create a backing copy of physical memory in case required
+ if options.access_backing_store:
+ ruby.phys_mem = SimpleMemory(range=AddrRange(options.mem_size),
+ in_addr_map=False)
+
def send_evicts(options):
# currently, 2 scenarios warrant forwarding evictions to the CPU:
# 1. The O3 model must keep the LSQ coherent with the caches
@@ -240,8 +245,3 @@ def send_evicts(options):
if options.cpu_type == "detailed" or buildEnv['TARGET_ISA'] == 'x86':
return True
return False
-
- # Create a backing copy of physical memory in case required
- if options.access_backing_store:
- ruby.phys_mem = SimpleMemory(range=AddrRange(options.mem_size),
- in_addr_map=False)