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author | Ali Saidi <Ali.Saidi@ARM.com> | 2012-03-09 09:59:25 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2012-03-09 09:59:25 -0500 |
commit | eaa994e7f6c12f6dc3e17836052f76a5ce9bdc01 (patch) | |
tree | d24450f54631a6e82b3c01b93fcf9e698eeee708 /configs | |
parent | cda4c2d280e9c1becf3b4d0b6b384f63641c45ba (diff) | |
download | gem5-eaa994e7f6c12f6dc3e17836052f76a5ce9bdc01.tar.xz |
cache: Allow main memory to be at disjoint address ranges.
Diffstat (limited to 'configs')
-rw-r--r-- | configs/example/fs.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/example/fs.py b/configs/example/fs.py index 7a0759e47..19c1bd81f 100644 --- a/configs/example/fs.py +++ b/configs/example/fs.py @@ -159,7 +159,7 @@ if bm[0]: else: mem_size = SysConfig().mem() if options.caches or options.l2cache: - test_sys.iocache = IOCache(addr_range=test_sys.physmem.range) + test_sys.iocache = IOCache(addr_ranges=[mem_size]) test_sys.iocache.cpu_side = test_sys.iobus.master test_sys.iocache.mem_side = test_sys.membus.slave else: |