Comments and code cleanup.

cpu/activity.cc:
cpu/activity.hh:
cpu/o3/alpha_cpu.hh:
    Updates to include comments.
cpu/base_dyn_inst.cc:
    Remove call to thread->misspeculating(), as it's never actually misspeculating.

--HG--
extra : convert_revision : 86574d684770fac9b480475acca048ea418cdac3

1 files changed, 33 insertions, 0 deletions

diff --git a/cpu/activity.cc b/cpu/activity.cc
index 6dcb6e341..b0b16446c 100644
--- a/cpu/activity.cc
+++ b/cpu/activity.cc
@@ -1,3 +1,30 @@
+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
 
 #include "base/timebuf.hh"
 #include "cpu/activity.hh"
@@ -14,6 +41,8 @@ ActivityRecorder::ActivityRecorder(int num_stages, int longest_latency,
 void
 ActivityRecorder::activity()
 {
+    // If we've already recorded activity for this cycle, we don't
+    // want to increment the count any more.
     if (activityBuffer[0]) {
         return;
     }
@@ -28,6 +57,8 @@ ActivityRecorder::activity()
 void
 ActivityRecorder::advance()
 {
+    // If there's a 1 in the slot that is about to be erased once the
+    // time buffer advances, then decrement the activityCount.
     if (activityBuffer[-longestLatency]) {
         --activityCount;
 
@@ -46,6 +77,7 @@ ActivityRecorder::advance()
 void
 ActivityRecorder::activateStage(const int idx)
 {
+    // Increment the activity count if this stage wasn't already active.
     if (!stageActive[idx]) {
         ++activityCount;
 
@@ -62,6 +94,7 @@ ActivityRecorder::activateStage(const int idx)
 void
 ActivityRecorder::deactivateStage(const int idx)
 {
+    // Decrement the activity count if this stage was active.
     if (stageActive[idx]) {
         --activityCount;