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| author | Korey Sewell <ksewell@umich.edu> | 2006-02-18 14:38:23 -0500 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2006-02-18 14:38:23 -0500 |
| commit | bd175809286e8da64176da977aeb27fc6ff6d272 (patch) | |
| tree | d6c9d1fc0388e730a73408c483789ef88fa51b0e /cpu/base.hh | |
| parent | 159e3345314b921f05f808ace06d62adf79f095a (diff) | |
| download | gem5-bd175809286e8da64176da977aeb27fc6ff6d272.tar.xz | |
changes from mergedmem
arch/mips/isa/formats/branch.isa:
add branch_likely member functions
cpu/base.hh:
cpu/exec_context.hh:
cpu/static_inst.hh:
change from mergedmem
--HG--
extra : convert_revision : d6ad6943e2ef09eac91a466fc5c9bd8e66bf319a
Diffstat (limited to 'cpu/base.hh')
| -rw-r--r-- | cpu/base.hh | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/cpu/base.hh b/cpu/base.hh index 2bd1210d8..09a73ab16 100644 --- a/cpu/base.hh +++ b/cpu/base.hh @@ -36,7 +36,7 @@ #include "cpu/sampler/sampler.hh" #include "sim/eventq.hh" #include "sim/sim_object.hh" -#include "arch/isa_traits.hh" +#include "targetarch/isa_traits.hh" #if FULL_SYSTEM class System; @@ -140,6 +140,8 @@ class BaseCPU : public SimObject virtual void startup(); virtual void regStats(); + virtual void activateWhenReady(int tid) {}; + void registerExecContexts(); /// Prepare for another CPU to take over execution. When it is |