diff options
author | Kevin Lim <ktlim@umich.edu> | 2005-01-11 18:52:29 -0500 |
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committer | Kevin Lim <ktlim@umich.edu> | 2005-01-11 18:52:29 -0500 |
commit | 90d4436351620bd3861013333aabd152d5492df7 (patch) | |
tree | 47216913009940d2380afce1e0ecaf6f7e1c73ec /cpu/beta_cpu/decode_impl.hh | |
parent | 2fb632dbda1b5db9163322541676cef52a55029f (diff) | |
download | gem5-90d4436351620bd3861013333aabd152d5492df7.tar.xz |
Slight fixes, add in commit trace flag.
base/traceflags.py:
Add new commit rate trace flag.
build/SConstruct:
Add extra option for efence.
cpu/beta_cpu/alpha_full_cpu_impl.hh:
Use function calls instead of direct indexing (avoids confusion).
cpu/beta_cpu/commit_impl.hh:
Add commit rate trace output (might not be worthwhile in the future).
cpu/beta_cpu/decode_impl.hh:
Remove some older hacks. Fix it so that the isntruction properly sets its next
PC to the one calculated by the branch.
cpu/beta_cpu/fetch_impl.hh:
Remove old commented code.
cpu/beta_cpu/iew_impl.hh:
Add extra check to ensure that the instruction is valid.
cpu/beta_cpu/regfile.hh:
Include trace file.
--HG--
extra : convert_revision : 4ee1dc88f8a5ed9b65486c6c111a3718a8040e42
Diffstat (limited to 'cpu/beta_cpu/decode_impl.hh')
-rw-r--r-- | cpu/beta_cpu/decode_impl.hh | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/cpu/beta_cpu/decode_impl.hh b/cpu/beta_cpu/decode_impl.hh index 8b20bf8bc..dd51f564d 100644 --- a/cpu/beta_cpu/decode_impl.hh +++ b/cpu/beta_cpu/decode_impl.hh @@ -147,7 +147,7 @@ SimpleDecode<Impl>::squash(DynInstPtr &inst) { DPRINTF(Decode, "Decode: Squashing due to incorrect branch prediction " "detected at decode.\n"); - Addr new_PC = inst->nextPC; + Addr new_PC = inst->readNextPC(); toFetch->decodeInfo.branchMispredict = true; toFetch->decodeInfo.doneSeqNum = inst->seqNum; @@ -355,10 +355,9 @@ SimpleDecode<Impl>::decode() // Go ahead and compute any PC-relative branches. - if (inst->isDirectCtrl() && inst->isUncondCtrl() && - inst->numDestRegs() == 0 && inst->numSrcRegs() == 0) { - inst->execute(); - inst->setExecuted(); + if (inst->isDirectCtrl() && inst->isUncondCtrl()) { + + inst->setNextPC(inst->branchTarget()); if (inst->mispredicted()) { ++decodeBranchMispred; |