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author | Kevin Lim <ktlim@umich.edu> | 2005-02-11 17:54:33 -0500 |
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committer | Kevin Lim <ktlim@umich.edu> | 2005-02-11 17:54:33 -0500 |
commit | c4d0ebd25cc5f0657b99543ff2df30d1a86f3ad5 (patch) | |
tree | f8eb75062055458ed2b2f44e4e87d2089c2debf4 /cpu/beta_cpu/rob.hh | |
parent | 1e7a744c09d0bde70e0f83179fdf4d6059585e4b (diff) | |
download | gem5-c4d0ebd25cc5f0657b99543ff2df30d1a86f3ad5.tar.xz |
Fix up #defines to use full path; fix up code for g++ 3.4
SConscript:
Remove efence option from automatically being used.
--HG--
extra : convert_revision : 466bb8077aa341db0b409720e2a73535b1fa6b69
Diffstat (limited to 'cpu/beta_cpu/rob.hh')
-rw-r--r-- | cpu/beta_cpu/rob.hh | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/cpu/beta_cpu/rob.hh b/cpu/beta_cpu/rob.hh index c921c0619..da6b5232a 100644 --- a/cpu/beta_cpu/rob.hh +++ b/cpu/beta_cpu/rob.hh @@ -4,15 +4,13 @@ // all instructions after the instruction, and all instructions after *and* // including that instruction. -#ifndef __ROB_HH__ -#define __ROB_HH__ +#ifndef __CPU_BETA_CPU_ROB_HH__ +#define __CPU_BETA_CPU_ROB_HH__ -#include<utility> -#include<vector> +#include <utility> +#include <vector> -#include "arch/alpha/isa_traits.hh" - -using namespace std; +//#include "arch/alpha/isa_traits.hh" /** * ROB class. Uses the instruction list that exists within the CPU to @@ -28,7 +26,7 @@ class ROB typedef typename Impl::FullCPU FullCPU; typedef typename Impl::DynInstPtr DynInstPtr; - typedef pair<RegIndex, PhysRegIndex> UnmapInfo_t; + typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo_t; typedef typename list<DynInstPtr>::iterator InstIt_t; public: @@ -135,4 +133,4 @@ class ROB bool doneSquashing; }; -#endif //__ROB_HH__ +#endif //__CPU_BETA_CPU_ROB_HH__ |