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| author | Kevin Lim <ktlim@umich.edu> | 2006-08-11 17:42:59 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-08-11 17:42:59 -0400 |
| commit | 716ceb6c107751fded501f18466a4166b7809e64 (patch) | |
| tree | 5c3fc8f455d79c647ffaab96ee594b8d911fc678 /cpu/checker/cpu_builder.cc | |
| parent | 5ec58c4bdc2ffa8c650a784efc5a342a3ad36810 (diff) | |
| download | gem5-716ceb6c107751fded501f18466a4166b7809e64.tar.xz | |
Code update for CPU models.
arch/alpha/isa_traits.hh:
Add in clear functions.
cpu/base.cc:
cpu/base.hh:
Add in CPU progress event.
cpu/base_dyn_inst.hh:
Mimic normal registers in terms of writing/reading floats.
cpu/checker/cpu.cc:
cpu/checker/cpu.hh:
cpu/checker/cpu_builder.cc:
cpu/checker/o3_cpu_builder.cc:
Fix up stuff.
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
Bring up to speed with newmem.
cpu/o3/alpha_cpu_builder.cc:
Allow for progress intervals.
cpu/o3/tournament_pred.cc:
Fix up predictor.
cpu/o3/tournament_pred.hh:
cpu/ozone/cpu.hh:
cpu/ozone/cpu_impl.hh:
cpu/simple/cpu.cc:
Fixes.
cpu/ozone/cpu_builder.cc:
Allow progress interval.
cpu/ozone/front_end_impl.hh:
Comment out this message.
cpu/ozone/lw_back_end_impl.hh:
Remove this.
python/m5/objects/BaseCPU.py:
Add progress interval.
python/m5/objects/Root.py:
Allow for stat reset.
sim/serialize.cc:
sim/stat_control.cc:
Add in stats reset.
--HG--
extra : convert_revision : fdb5ac5542099173cc30c40ea93372a065534b5e
Diffstat (limited to 'cpu/checker/cpu_builder.cc')
| -rw-r--r-- | cpu/checker/cpu_builder.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/cpu/checker/cpu_builder.cc b/cpu/checker/cpu_builder.cc index 802944e47..d1b5434c3 100644 --- a/cpu/checker/cpu_builder.cc +++ b/cpu/checker/cpu_builder.cc @@ -58,6 +58,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(OzoneChecker) Param<Counter> max_insts_all_threads; Param<Counter> max_loads_any_thread; Param<Counter> max_loads_all_threads; + Param<Tick> progress_interval; #if FULL_SYSTEM SimObjectParam<AlphaITB *> itb; @@ -91,6 +92,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(OzoneChecker) "terminate when any thread reaches this load count"), INIT_PARAM(max_loads_all_threads, "terminate when all threads have reached this load count"), + INIT_PARAM_DFLT(progress_interval, "CPU Progress Interval", 0), #if FULL_SYSTEM INIT_PARAM(itb, "Instruction TLB"), @@ -138,6 +140,8 @@ CREATE_SIM_OBJECT(OzoneChecker) temp = max_insts_all_threads; temp = max_loads_any_thread; temp = max_loads_all_threads; + Tick temp2 = progress_interval; + temp2++; BaseMem *cache = icache; cache = dcache; |