Faults generated at fetch are passed to the backend by creating a dummy nop instruction and giving it the fault. This unifies front end faults and normal instruction faults.

cpu/checker/cpu.cc:
    Fixups for fetch fault being sent with the instruction.
cpu/o3/fetch_impl.hh:
cpu/ozone/front_end_impl.hh:
    Send any faults generated at fetch along with a fake nop instruction to the back end.  This avoids having to use direct communication to check if the entire front end has drained; it is naturally handled through the nop's fault being handled when it reaches the head of commit.
cpu/ozone/front_end.hh:
    Add extra status TrapPending.
cpu/ozone/lw_back_end_impl.hh:
    Fetch fault handled through a dummy nop carrying the fetch fault.

    Avoid putting Nops on the exeList.

--HG--
extra : convert_revision : 8d9899748b34c204763a49c48a9b5113864f5789

1 files changed, 25 insertions, 20 deletions

diff --git a/cpu/checker/cpu.cc b/cpu/checker/cpu.cc
index f1b43f601..f76f1e063 100644
--- a/cpu/checker/cpu.cc
+++ b/cpu/checker/cpu.cc
@@ -607,41 +607,46 @@ Checker<DynInstPtr>::tick(DynInstPtr &completed_inst)
         bool succeeded = translateInstReq(memReq);
 
         if (!succeeded) {
-            warn("Instruction PC %#x was not found in the ITB!",
-                 cpuXC->readPC());
-            handleError();
+            if (inst->getFault() == NoFault) {
+                warn("Instruction PC %#x was not found in the ITB!",
+                     cpuXC->readPC());
+                handleError();
 
-            // go to the next instruction
-            cpuXC->setPC(cpuXC->readNextPC());
-            cpuXC->setNextPC(cpuXC->readNextPC() + sizeof(MachInst));
+                // go to the next instruction
+                cpuXC->setPC(cpuXC->readNextPC());
+                cpuXC->setNextPC(cpuXC->readNextPC() + sizeof(MachInst));
 
-            return;
+                return;
+            } else {
+                fault = inst->getFault();
+            }
         }
 
-//    if (fault == NoFault)
+        if (fault == NoFault) {
 //        fault = cpuXC->mem->read(memReq, machInst);
-        cpuXC->mem->read(memReq, machInst);
+            cpuXC->mem->read(memReq, machInst);
 
-        // If we've got a valid instruction (i.e., no fault on instruction
-        // fetch), then execute it.
+            // If we've got a valid instruction (i.e., no fault on instruction
+            // fetch), then execute it.
 
         // keep an instruction count
-        numInst++;
+            numInst++;
 //	numInsts++;
 
-        // decode the instruction
-        machInst = gtoh(machInst);
-        // Checks that the instruction matches what we expected it to be.
-        // Checks both the machine instruction and the PC.
-        validateInst(inst);
+            // decode the instruction
+            machInst = gtoh(machInst);
+            // Checks that the instruction matches what we expected it to be.
+            // Checks both the machine instruction and the PC.
+            validateInst(inst);
 
-        curStaticInst = StaticInst::decode(makeExtMI(machInst, cpuXC->readPC()));
+            curStaticInst = StaticInst::decode(makeExtMI(machInst, cpuXC->readPC()));
 
 #if FULL_SYSTEM
-        cpuXC->setInst(machInst);
+            cpuXC->setInst(machInst);
 #endif // FULL_SYSTEM
 
-        fault = inst->getFault();
+            fault = inst->getFault();
+        }
 
         // Either the instruction was a fault and we should process the fault,
         // or we should just go ahead execute the instruction.  This assumes