Code update for CPU models.

arch/alpha/isa_traits.hh:
    Add in clear functions.
cpu/base.cc:
cpu/base.hh:
    Add in CPU progress event.
cpu/base_dyn_inst.hh:
    Mimic normal registers in terms of writing/reading floats.
cpu/checker/cpu.cc:
cpu/checker/cpu.hh:
cpu/checker/cpu_builder.cc:
cpu/checker/o3_cpu_builder.cc:
    Fix up stuff.
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
    Bring up to speed with newmem.
cpu/o3/alpha_cpu_builder.cc:
    Allow for progress intervals.
cpu/o3/tournament_pred.cc:
    Fix up predictor.
cpu/o3/tournament_pred.hh:
cpu/ozone/cpu.hh:
cpu/ozone/cpu_impl.hh:
cpu/simple/cpu.cc:
    Fixes.
cpu/ozone/cpu_builder.cc:
    Allow progress interval.
cpu/ozone/front_end_impl.hh:
    Comment out this message.
cpu/ozone/lw_back_end_impl.hh:
    Remove this.
python/m5/objects/BaseCPU.py:
    Add progress interval.
python/m5/objects/Root.py:
    Allow for stat reset.
sim/serialize.cc:
sim/stat_control.cc:
    Add in stats reset.

--HG--
extra : convert_revision : fdb5ac5542099173cc30c40ea93372a065534b5e

1 files changed, 49 insertions, 7 deletions

diff --git a/cpu/cpu_exec_context.cc b/cpu/cpu_exec_context.cc
index e28c34f88..0dcf149fd 100644
--- a/cpu/cpu_exec_context.cc
+++ b/cpu/cpu_exec_context.cc
@@ -118,6 +118,20 @@ CPUExecContext::CPUExecContext(RegFile *regFile)
 
 #endif
 
+CPUExecContext::CPUExecContext()
+#if !FULL_SYSTEM
+    : cpu(NULL), thread_num(-1), process(NULL), mem(NULL), asid(-1),
+      func_exe_inst(0), storeCondFailures(0)
+#else
+    : cpu(NULL), thread_num(-1), cpu_id(-1), lastActivate(0), lastSuspend(0),
+      mem(NULL), itb(NULL), dtb(NULL), system(NULL), memctrl(NULL),
+      physmem(NULL), profile(NULL), func_exe_inst(0), storeCondFailures(0)
+#endif
+{
+    regs.clear();
+    proxy = new ProxyExecContext<CPUExecContext>(this);
+}
+
 CPUExecContext::~CPUExecContext()
 {
     delete proxy;
@@ -158,13 +172,8 @@ CPUExecContext::takeOverFrom(ExecContext *oldContext)
     assert(process == oldContext->getProcessPtr());
 #endif
 
-    // copy over functional state
-    _status = oldContext->status();
-    copyArchRegs(oldContext);
-    cpu_id = oldContext->readCpuId();
-#if !FULL_SYSTEM
-    func_exe_inst = oldContext->readFuncExeInst();
-#else
+    copyState(oldContext);
+#if FULL_SYSTEM
     EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent();
     if (quiesce) {
         // Point the quiesce event's XC at this XC so that it wakes up
@@ -182,6 +191,36 @@ CPUExecContext::takeOverFrom(ExecContext *oldContext)
 }
 
 void
+CPUExecContext::copyXC(ExecContext *context)
+{
+    copyState(context);
+
+#if FULL_SYSTEM
+    EndQuiesceEvent *quiesce = context->getQuiesceEvent();
+    if (quiesce) {
+        quiesceEvent = quiesce;
+    }
+    Kernel::Statistics *stats = context->getKernelStats();
+    if (stats) {
+        kernelStats = stats;
+    }
+#endif
+}
+
+void
+CPUExecContext::copyState(ExecContext *oldContext)
+{
+    // copy over functional state
+    _status = oldContext->status();
+    copyArchRegs(oldContext);
+    cpu_id = oldContext->readCpuId();
+#if !FULL_SYSTEM
+    func_exe_inst = oldContext->readFuncExeInst();
+#endif
+    inst = oldContext->getInst();
+}
+
+void
 CPUExecContext::serialize(ostream &os)
 {
     SERIALIZE_ENUM(_status);
@@ -294,6 +333,8 @@ CPUExecContext::regStats(const string &name)
 void
 CPUExecContext::copyArchRegs(ExecContext *xc)
 {
+    TheISA::copyRegs(xc, proxy);
+/*
     // First loop through the integer registers.
     for (int i = 0; i < AlphaISA::NumIntRegs; ++i) {
         setIntReg(i, xc->readIntReg(i));
@@ -311,5 +352,6 @@ CPUExecContext::copyArchRegs(ExecContext *xc)
     // Lastly copy PC/NPC
     setPC(xc->readPC());
     setNextPC(xc->readNextPC());
+*/
 }