Fixes for full system compiling.

arch/alpha/arguments.cc:
    There will not be a phys mem ptr in the XC in the newmem.  This read will have to go through something else.
arch/alpha/ev5.cc:
    Remove instantiations of these functions for the FastCPU, as the FastCPU is not really used.  Also this messed up the ability to specify which CPU models are being built.
cpu/exec_context.hh:
    Remove getPhysMemPtr() function.
cpu/exetrace.cc:
    Include sim/system.hh, and sort the includes.
cpu/simple/cpu.cc:
    Fixes for full system compilation.
kern/system_events.cc:
    Remove include of encumbered FullCPU.  The branch prediction will need to be fixed up in a more generic way in the future.

--HG--
extra : convert_revision : a8bbf562a277aa80e8f40112570c0a825298a05c

1 files changed, 8 insertions, 9 deletions

diff --git a/cpu/cpu_exec_context.hh b/cpu/cpu_exec_context.hh
index 236619752..83afb3b85 100644
--- a/cpu/cpu_exec_context.hh
+++ b/cpu/cpu_exec_context.hh
@@ -121,9 +121,6 @@ class CPUExecContext
 
     System *system;
 
-    /// Port that syscalls can use to access memory (provides translation step).
-    TranslatingPort *port;
-//    Memory *mem;
 
 #if FULL_SYSTEM
     AlphaITB *itb;
@@ -167,6 +164,9 @@ class CPUExecContext
     void profileSample();
 
 #else
+    /// Port that syscalls can use to access memory (provides translation step).
+    TranslatingPort *port;
+
     Process *process;
 
     // Address space ID.  Note that this is used for TIMING cache
@@ -203,9 +203,10 @@ class CPUExecContext
     // constructor: initialize context from given process structure
 #if FULL_SYSTEM
     CPUExecContext(BaseCPU *_cpu, int _thread_num, System *_system,
-                   AlphaITB *_itb, AlphaDTB *_dtb, FunctionalMemory *_dem);
+                   AlphaITB *_itb, AlphaDTB *_dtb);
 #else
-    CPUExecContext(BaseCPU *_cpu, int _thread_num, Process *_process, int _asid, Port *mem_port);
+    CPUExecContext(BaseCPU *_cpu, int _thread_num, Process *_process,
+                   int _asid, Port *mem_port);
     // Constructor to use XC to pass reg file around.  Not used for anything
     // else.
     CPUExecContext(RegFile *regFile);
@@ -219,8 +220,6 @@ class CPUExecContext
     void serialize(std::ostream &os);
     void unserialize(Checkpoint *cp, const std::string &section);
 
-    TranslatingPort *getMemPort() { return port; }
-
     BaseCPU *getCpuPtr() { return cpu; }
 
     ExecContext *getProxy() { return proxy; }
@@ -230,8 +229,6 @@ class CPUExecContext
 #if FULL_SYSTEM
     System *getSystemPtr() { return system; }
 
-    PhysicalMemory *getPhysMemPtr() { return physmem; }
-
     AlphaITB *getITBPtr() { return itb; }
 
     AlphaDTB *getDTBPtr() { return dtb; }
@@ -255,6 +252,8 @@ class CPUExecContext
     }
 
 #else
+    TranslatingPort *getMemPort() { return port; }
+
     Process *getProcessPtr() { return process; }
 
     int getInstAsid() { return asid; }