Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt.

arch/alpha/arguments.cc:
    Renamed readFloatRegInt to readFloatRegBits
arch/alpha/ev5.cc:
    Removed the Double from setFloatRegDouble
arch/alpha/registerfile.hh:
    Changed the floating point register file from a union of arrays to a class with appropriate accessor functions. The interface is necessary for SPARC.
arch/alpha/types.hh:
    Changed the FloatReg type from a union of uint64_t and double to a double, and defined a new type FloatRegBits which is a uint64_t and is used to return the bits which compose a floating point register rather than the value of the register.
arch/isa_parser.py:
    Adjusted the makeRead and makeWrite functions to generate the new versions of readFloatReg and setFloatReg.
base/remote_gdb.cc:
kern/tru64/tru64.hh:
    Replaced setFloatRegInt with setFloatRegBits
cpu/cpu_exec_context.cc:
    Removed the duplicated code for setting the floating point registers, and renamed the function to setFloatRegBits and readFloatRegBits.
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/o3/alpha_cpu_impl.hh:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/regfile.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.hh:
    Implemented the new versions of the floating point read and set functions.
cpu/simple/cpu.cc:
    Replaced setFloatRegDouble with setFloatReg

--HG--
extra : convert_revision : 3dad06224723137f6033c335fb8f6395636767f2

1 files changed, 24 insertions, 12 deletions

diff --git a/cpu/cpu_exec_context.hh b/cpu/cpu_exec_context.hh
index 509583d65..2a90e07d3 100644
--- a/cpu/cpu_exec_context.hh
+++ b/cpu/cpu_exec_context.hh
@@ -70,6 +70,8 @@ class CPUExecContext
     typedef TheISA::MachInst MachInst;
     typedef TheISA::MiscRegFile MiscRegFile;
     typedef TheISA::MiscReg MiscReg;
+    typedef TheISA::FloatReg FloatReg;
+    typedef TheISA::FloatRegBits FloatRegBits;
   public:
     typedef ExecContext::Status Status;
 
@@ -374,19 +376,24 @@ class CPUExecContext
         return regs.intRegFile[reg_idx];
     }
 
-    float readFloatRegSingle(int reg_idx)
+    FloatReg readFloatReg(int reg_idx, int width)
     {
-        return (float)regs.floatRegFile.d[reg_idx];
+        return regs.floatRegFile.readReg(reg_idx, width);
     }
 
-    double readFloatRegDouble(int reg_idx)
+    FloatReg readFloatReg(int reg_idx)
     {
-        return regs.floatRegFile.d[reg_idx];
+        return regs.floatRegFile.readReg(reg_idx);
     }
 
-    uint64_t readFloatRegInt(int reg_idx)
+    FloatRegBits readFloatRegBits(int reg_idx, int width)
     {
-        return regs.floatRegFile.q[reg_idx];
+        return regs.floatRegFile.readRegBits(reg_idx, width);
+    }
+
+    FloatRegBits readFloatRegBits(int reg_idx)
+    {
+        return regs.floatRegFile.readRegBits(reg_idx);
     }
 
     void setIntReg(int reg_idx, uint64_t val)
@@ -394,19 +401,24 @@ class CPUExecContext
         regs.intRegFile[reg_idx] = val;
     }
 
-    void setFloatRegSingle(int reg_idx, float val)
+    void setFloatReg(int reg_idx, FloatReg val, int width)
+    {
+        regs.floatRegFile.setReg(reg_idx, val, width);
+    }
+
+    void setFloatReg(int reg_idx, FloatReg val)
     {
-        regs.floatRegFile.d[reg_idx] = (double)val;
+        regs.floatRegFile.setReg(reg_idx, val);
     }
 
-    void setFloatRegDouble(int reg_idx, double val)
+    void setFloatRegBits(int reg_idx, FloatRegBits val, int width)
     {
-        regs.floatRegFile.d[reg_idx] = val;
+        regs.floatRegFile.setRegBits(reg_idx, val, width);
     }
 
-    void setFloatRegInt(int reg_idx, uint64_t val)
+    void setFloatRegBits(int reg_idx, FloatRegBits val)
     {
-        regs.floatRegFile.q[reg_idx] = val;
+        regs.floatRegFile.setRegBits(reg_idx, val);
     }
 
     uint64_t readPC()