Macros are nasty, so let's get rid of them. Convert all

all macros in ev5.hh to inline functions or constant typed
variables and make them follow our style while we're at it.

All of the stuff in this file actually belongs in the ISA
traits code, but this is a first step at getting things done
in the right manner.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/ev5.cc:
arch/alpha/isa_desc:
dev/ns_gige.cc:
kern/tru64/tru64_events.cc:
    deal with changes in ev5.hh
arch/alpha/ev5.hh:
    Macros are nasty, so let's get rid of them.  Convert all
    all macros to inline functions or constant typed variables.
    Make them follow our style while we're at it.

    All of the stuff in this file actually belongs in the ISA
    traits code, but this is a first step at getting things done
    in the right manner.
arch/alpha/isa_traits.hh:
    move some of the ev5 specific code into the isa
arch/alpha/vtophys.cc:
base/remote_gdb.cc:
    deal with isa addition
cpu/exec_context.hh:
    be less isa specific and use the isa traits to figure out
    what we can.
dev/alpha_console.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
    deal with changes in ev5.hh
    I don't believe this masking is actually necessary.  We should
    look at removing it later.
dev/ide_ctrl.cc:
    sort #includes
    deal with changes in ev5.hh

--HG--
extra : convert_revision : c8a3adf0a4b1d198aefe38fc38b295abf289b08a

1 files changed, 3 insertions, 3 deletions

diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index 2ba2d7524..8437a5585 100644
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -196,8 +196,8 @@ class ExecContext
 #ifdef FULL_SYSTEM
     bool validInstAddr(Addr addr) { return true; }
     bool validDataAddr(Addr addr) { return true; }
-    int getInstAsid() { return ITB_ASN_ASN(regs.ipr[TheISA::IPR_ITB_ASN]); }
-    int getDataAsid() { return DTB_ASN_ASN(regs.ipr[TheISA::IPR_DTB_ASN]); }
+    int getInstAsid() { return regs.instAsid(); }
+    int getDataAsid() { return regs.dataAsid(); }
 
     Fault translateInstReq(MemReqPtr &req)
     {
@@ -410,7 +410,7 @@ class ExecContext
     int readIntrFlag() { return regs.intrflag; }
     void setIntrFlag(int val) { regs.intrflag = val; }
     Fault hwrei();
-    bool inPalMode() { return PC_PAL(regs.pc); }
+    bool inPalMode() { return AlphaISA::PcPAL(regs.pc); }
     void ev5_trap(Fault fault);
     bool simPalCheck(int palFunc);
 #endif