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authorRon Dreslinski <rdreslin@umich.edu>2005-03-07 10:58:15 -0500
committerRon Dreslinski <rdreslin@umich.edu>2005-03-07 10:58:15 -0500
commitb290ecf1bb0d3d65f4f2ddd72e0273a203d36243 (patch)
tree808819330f22050ea78351df14a3a741c33e5f37 /cpu/full_cpu/op_class.hh
parent45eb26e67c4be623dd0cb0b660caa1200f729d42 (diff)
parente5f945967b2d49f3c14384be947a12dbf02260da (diff)
downloadgem5-b290ecf1bb0d3d65f4f2ddd72e0273a203d36243.tar.xz
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1 --HG-- extra : convert_revision : 2b73bffea88cb0e3bb5dff232a15afea8498f4e3
Diffstat (limited to 'cpu/full_cpu/op_class.hh')
-rw-r--r--cpu/full_cpu/op_class.hh1
1 files changed, 1 insertions, 0 deletions
diff --git a/cpu/full_cpu/op_class.hh b/cpu/full_cpu/op_class.hh
index a14ccfaed..8e85e8d8a 100644
--- a/cpu/full_cpu/op_class.hh
+++ b/cpu/full_cpu/op_class.hh
@@ -51,6 +51,7 @@ enum OpClass {
FloatSqrtOp, /* floating point square root */
MemReadOp, /* memory read port */
MemWriteOp, /* memory write port */
+ IprAccessOp, /* Internal Processor Register read/write port */
InstPrefetchOp, /* instruction prefetch port (on I-cache) */
Num_OpClasses /* total functional unit classes */
};