summaryrefslogtreecommitdiff
path: root/cpu/o3/alpha_cpu_builder.cc
diff options
context:
space:
mode:
authorMiguel Serrano <mserrano@umich.edu>2005-07-01 15:12:09 -0400
committerMiguel Serrano <mserrano@umich.edu>2005-07-01 15:12:09 -0400
commit4f2480a18bdf98792e2ebf3471ce7cd3109ef824 (patch)
treeb2d8d27e41eae3d659dbe6e6665436d02bcea429 /cpu/o3/alpha_cpu_builder.cc
parent16a2357e8637fed706a94ab0da6226df8a2e7f07 (diff)
parentefd0c5d4b04f630f1b591af509458224b6d98655 (diff)
downloadgem5-4f2480a18bdf98792e2ebf3471ce7cd3109ef824.tar.xz
Merge m5read@m5.eecs.umich.edu:/bk/m5
into zamp.eecs.umich.edu:/.automount/fox/y/mserrano/m5_new/m5 --HG-- extra : convert_revision : bb3e977e79599c459fb32f309ce5b486f1639afa
Diffstat (limited to 'cpu/o3/alpha_cpu_builder.cc')
-rw-r--r--cpu/o3/alpha_cpu_builder.cc8
1 files changed, 3 insertions, 5 deletions
diff --git a/cpu/o3/alpha_cpu_builder.cc b/cpu/o3/alpha_cpu_builder.cc
index 57061c052..57c567471 100644
--- a/cpu/o3/alpha_cpu_builder.cc
+++ b/cpu/o3/alpha_cpu_builder.cc
@@ -71,9 +71,9 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(DerivAlphaFullCPU)
#ifdef FULL_SYSTEM
SimObjectParam<System *> system;
+Param<int> cpu_id;
SimObjectParam<AlphaITB *> itb;
SimObjectParam<AlphaDTB *> dtb;
-Param<int> mult;
#else
SimObjectVectorParam<Process *> workload;
#endif // FULL_SYSTEM
@@ -164,9 +164,9 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(DerivAlphaFullCPU)
#ifdef FULL_SYSTEM
INIT_PARAM(system, "System object"),
+ INIT_PARAM(cpu_id, "processor ID"),
INIT_PARAM(itb, "Instruction translation buffer"),
INIT_PARAM(dtb, "Data translation buffer"),
- INIT_PARAM(mult, "System clock multiplier"),
#else
INIT_PARAM(workload, "Processes to run"),
#endif // FULL_SYSTEM
@@ -274,9 +274,6 @@ CREATE_SIM_OBJECT(DerivAlphaFullCPU)
DerivAlphaFullCPU *cpu;
#ifdef FULL_SYSTEM
- if (mult != 1)
- panic("Processor clock multiplier must be 1?\n");
-
// Full-system only supports a single thread for the moment.
int actual_num_threads = 1;
#else
@@ -300,6 +297,7 @@ CREATE_SIM_OBJECT(DerivAlphaFullCPU)
#ifdef FULL_SYSTEM
params.system = system;
+ params.cpu_id = cpu_id;
params.itb = itb;
params.dtb = dtb;
#else