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author | Steve Reinhardt <stever@eecs.umich.edu> | 2005-08-30 13:18:54 -0400 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2005-08-30 13:18:54 -0400 |
commit | c4793184bd32e97e8932a9a0355d8a7b8a214752 (patch) | |
tree | d616bdd39c608898bd5fea6928166175e96d8d79 /cpu/o3/alpha_cpu_builder.cc | |
parent | e007aa59e3da2609de92cc6d2cfcd7acf9d4276f (diff) | |
download | gem5-c4793184bd32e97e8932a9a0355d8a7b8a214752.tar.xz |
Build options are set via a build_options file in the
build directory instead of being inferred from the name
of the build directory.
Options are passed to C++ via config/*.hh files instead of
via the command line. Build option flags are now always
defined to 0 or 1, so checks must use '#if' rather than
'#ifdef'.
SConscript:
MySQL detection moved to SConstruct.
Add config/*.hh files (via ConfigFile builder).
arch/alpha/alpha_memory.cc:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/isa_traits.hh:
base/fast_alloc.hh:
base/statistics.cc:
base/statistics.hh:
base/stats/events.cc:
base/stats/events.hh:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/o3/alpha_cpu.hh:
cpu/o3/alpha_cpu_builder.cc:
cpu/o3/alpha_cpu_impl.hh:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/alpha_params.hh:
cpu/o3/commit_impl.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/fetch_impl.hh:
cpu/o3/iew.hh:
cpu/o3/iew_impl.hh:
cpu/o3/regfile.hh:
cpu/o3/rename_impl.hh:
cpu/o3/rob_impl.hh:
cpu/ozone/cpu.hh:
cpu/pc_event.cc:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
sim/process.cc:
sim/process.hh:
Convert compile flags from def/undef to 0/1.
Set via #include config/*.hh instead of command line.
arch/alpha/isa_desc:
Convert compile flags from def/undef to 0/1.
Set via #include config/*.hh instead of command line.
Revamp fenv.h support... most of the ugliness is hidden
in base/fenv.hh now.
base/mysql.hh:
Fix typo in #ifndef guard.
build/SConstruct:
Build options are set via a build_options file in the
build directory instead of being inferred from the name
of the build directory.
Options are passed to C++ via config/*.hh files instead of
via the command line.
python/SConscript:
Generate m5_build_env directly from scons options
instead of indirectly via CPPDEFINES.
python/m5/convert.py:
Allow '0' and '1' for booleans.
Rewrite toBool to use dict.
base/fenv.hh:
Revamp <fenv.h> support to make it a compile option
(so we can test w/o it even if it's present) and to
make isa_desc cleaner.
--HG--
extra : convert_revision : 8f97dc11185bef5e1865b3269c7341df8525c9ad
Diffstat (limited to 'cpu/o3/alpha_cpu_builder.cc')
-rw-r--r-- | cpu/o3/alpha_cpu_builder.cc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/cpu/o3/alpha_cpu_builder.cc b/cpu/o3/alpha_cpu_builder.cc index 57c567471..3547fb1b5 100644 --- a/cpu/o3/alpha_cpu_builder.cc +++ b/cpu/o3/alpha_cpu_builder.cc @@ -45,7 +45,7 @@ #include "sim/sim_object.hh" #include "sim/stats.hh" -#ifdef FULL_SYSTEM +#if FULL_SYSTEM #include "base/remote_gdb.hh" #include "mem/functional/memory_control.hh" #include "mem/functional/physical.hh" @@ -69,7 +69,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(DerivAlphaFullCPU) Param<int> clock; Param<int> numThreads; -#ifdef FULL_SYSTEM +#if FULL_SYSTEM SimObjectParam<System *> system; Param<int> cpu_id; SimObjectParam<AlphaITB *> itb; @@ -162,7 +162,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(DerivAlphaFullCPU) INIT_PARAM(clock, "clock speed"), INIT_PARAM(numThreads, "number of HW thread contexts"), -#ifdef FULL_SYSTEM +#if FULL_SYSTEM INIT_PARAM(system, "System object"), INIT_PARAM(cpu_id, "processor ID"), INIT_PARAM(itb, "Instruction translation buffer"), @@ -273,7 +273,7 @@ CREATE_SIM_OBJECT(DerivAlphaFullCPU) { DerivAlphaFullCPU *cpu; -#ifdef FULL_SYSTEM +#if FULL_SYSTEM // Full-system only supports a single thread for the moment. int actual_num_threads = 1; #else @@ -295,7 +295,7 @@ CREATE_SIM_OBJECT(DerivAlphaFullCPU) params.name = getInstanceName(); params.numberOfThreads = actual_num_threads; -#ifdef FULL_SYSTEM +#if FULL_SYSTEM params.system = system; params.cpu_id = cpu_id; params.itb = itb; |