Pushed ev5.hh out of the non-alpha code.

arch/SConscript:
    ev5 should now be contained within alpha specific code.
arch/alpha/ev5.cc:
arch/alpha/isa_traits.hh:
    Added getInstAsid and getDataAsid functions. These should be removed when the SimpleScalar cpu model is removed.
arch/sparc/isa_traits.hh:
    Added getInstAsid and getDataAsid functions. These should be removed when the SimpleScalar cpu model is removed. Also made some small fixes.
cpu/o3/alpha_cpu.hh:
    Added typedefs which are required now that there isn't a using namespace EV5.
cpu/o3/alpha_cpu_impl.hh:
    Some small changes so that ev5.hh isn't needed directly.
cpu/o3/cpu.hh:
    Removed including ev5.hh, and pushed retrieving the Asid into the MiscRegFile.
cpu/o3/regfile.hh:
    Removed the include of ev5.hh, using namespace EV5, and the now redundant ipr array.

--HG--
extra : convert_revision : 5ef8f69435a3a888a3f06d0095d89326dafb33fd

1 files changed, 2 insertions, 1 deletions

diff --git a/cpu/o3/alpha_cpu_impl.hh b/cpu/o3/alpha_cpu_impl.hh
index a1c659b51..5ab9e6e75 100644
--- a/cpu/o3/alpha_cpu_impl.hh
+++ b/cpu/o3/alpha_cpu_impl.hh
@@ -26,6 +26,7 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include "arch/alpha/faults.hh"
 #include "base/cprintf.hh"
 #include "base/statistics.hh"
 #include "base/timebuf.hh"
@@ -257,7 +258,7 @@ Fault
 AlphaFullCPU<Impl>::hwrei()
 {
     if (!inPalMode())
-        return new UnimplementedOpcodeFault;
+        return new AlphaISA::UnimplementedOpcodeFault;
 
     this->setNextPC(this->regFile.miscRegs.readReg(AlphaISA::IPR_EXC_ADDR));