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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-03-14 16:08:32 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-03-14 16:08:32 -0500 |
| commit | fa763d2ecfae16e84a9f9d689d19f746d84d08e3 (patch) | |
| tree | 52474edfd8d1ab010a376b1eb66f4d9990fe4a54 /cpu/o3/alpha_cpu_impl.hh | |
| parent | f045b110cf1db6f9fc70589532b48d9cca339897 (diff) | |
| parent | efe46430fac2419a02062e3b282324498a55df28 (diff) | |
| download | gem5-fa763d2ecfae16e84a9f9d689d19f746d84d08e3.tar.xz | |
Merge m5.eecs.umich.edu:/bk/newmem
into ewok.(none):/home/gblack/m5/newmem
cpu/cpu_exec_context.cc:
Hand merge
--HG--
rename : arch/alpha/registerfile.hh => arch/alpha/regfile.hh
extra : convert_revision : bd18966f7c37c67c2bc7ca2633b58f70ce64409c
Diffstat (limited to 'cpu/o3/alpha_cpu_impl.hh')
| -rw-r--r-- | cpu/o3/alpha_cpu_impl.hh | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/cpu/o3/alpha_cpu_impl.hh b/cpu/o3/alpha_cpu_impl.hh index 9f1fa24f6..7c4c2b969 100644 --- a/cpu/o3/alpha_cpu_impl.hh +++ b/cpu/o3/alpha_cpu_impl.hh @@ -175,10 +175,8 @@ AlphaFullCPU<Impl>::copyToXC() for (int i = 0; i < AlphaISA::NumFloatRegs; ++i) { renamed_reg = this->renameMap.lookup(i + AlphaISA::FP_Base_DepTag); - this->cpuXC->setFloatRegDouble(i, - this->regFile.readFloatRegDouble(renamed_reg)); - this->cpuXC->setFloatRegInt(i, - this->regFile.readFloatRegInt(renamed_reg)); + this->cpuXC->setFloatRegBits(i, + this->regFile.readFloatRegBits(renamed_reg)); } this->cpuXC->setMiscReg(AlphaISA::Fpcr_DepTag, @@ -223,10 +221,8 @@ AlphaFullCPU<Impl>::copyFromXC() for (int i = 0; i < AlphaISA::NumFloatRegs; ++i) { renamed_reg = this->renameMap.lookup(i + AlphaISA::FP_Base_DepTag); - this->regFile.setFloatRegDouble(renamed_reg, - this->cpuXC->readFloatRegDouble(i)); - this->regFile.setFloatRegInt(renamed_reg, - this->cpuXC->readFloatRegInt(i)); + this->regFile.setFloatRegBits(renamed_reg, + this->cpuXC->readFloatRegBits(i)); } // Then loop through the misc registers. |