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authorKevin Lim <ktlim@umich.edu>2006-04-22 18:26:48 -0400
committerKevin Lim <ktlim@umich.edu>2006-04-22 18:26:48 -0400
commita8b03e4d017b66d7b5502a101ea5b7115827a107 (patch)
tree9e606dc41a9b84a574d6935e5718c8fe665cc32f /cpu/o3/iew.cc
parentc30f91c2f634a0b55a9b9b9145b1fbe605bb1a02 (diff)
downloadgem5-a8b03e4d017b66d7b5502a101ea5b7115827a107.tar.xz
Updates for O3 model.
arch/alpha/isa/decoder.isa: Make IPR accessing instructions serializing so they are not issued incorrectly in the O3 model. arch/alpha/isa/pal.isa: Allow IPR instructions to have flags. base/traceflags.py: Include new trace flags from the two new CPU models. cpu/SConscript: Create the templates for the split mem accessor methods. Also include the new files from the new models (the Ozone model will be checked in next). cpu/base_dyn_inst.cc: cpu/base_dyn_inst.hh: Update to the BaseDynInst for the new models. --HG-- extra : convert_revision : cc82db9c72ec3e29cea4c3fdff74a3843e287a35
Diffstat (limited to 'cpu/o3/iew.cc')
-rw-r--r--cpu/o3/iew.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/o3/iew.cc b/cpu/o3/iew.cc
index 45b5610e7..90d035f71 100644
--- a/cpu/o3/iew.cc
+++ b/cpu/o3/iew.cc
@@ -31,4 +31,4 @@
#include "cpu/o3/iew_impl.hh"
#include "cpu/o3/inst_queue.hh"
-template class SimpleIEW<AlphaSimpleImpl>;
+template class DefaultIEW<AlphaSimpleImpl>;