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authorKevin Lim <ktlim@umich.edu>2006-05-23 17:04:25 -0400
committerKevin Lim <ktlim@umich.edu>2006-05-23 17:04:25 -0400
commitb414c9e736543acca639c50582c7df7abf59c11b (patch)
tree8eaa0fa7061af351955c59f0e2a525f3527f2ee7 /cpu/o3/inst_queue_impl.hh
parenteeeee7c58f26fac9fe9b8606e26ef8e99a28e399 (diff)
parent358cf1b11765024309fe986262bb3a3d16c8a720 (diff)
downloadgem5-b414c9e736543acca639c50582c7df7abf59c11b.tar.xz
Merge ktlim@zizzer:/bk/m5
into zamp.eecs.umich.edu:/z/ktlim2/clean/m5-o3 --HG-- extra : convert_revision : 0a6140f3f5e7c454981c5aa2b221224f076e50eb
Diffstat (limited to 'cpu/o3/inst_queue_impl.hh')
-rw-r--r--cpu/o3/inst_queue_impl.hh22
1 files changed, 17 insertions, 5 deletions
diff --git a/cpu/o3/inst_queue_impl.hh b/cpu/o3/inst_queue_impl.hh
index 71541b4f8..f1dc4e01f 100644
--- a/cpu/o3/inst_queue_impl.hh
+++ b/cpu/o3/inst_queue_impl.hh
@@ -589,6 +589,16 @@ InstructionQueue<Impl>::insertBarrier(DynInstPtr &barr_inst)
}
template <class Impl>
+typename Impl::DynInstPtr
+InstructionQueue<Impl>::getInstToExecute()
+{
+ assert(!instsToExecute.empty());
+ DynInstPtr inst = instsToExecute.front();
+ instsToExecute.pop_front();
+ return inst;
+}
+
+template <class Impl>
void
InstructionQueue<Impl>::addToOrderList(OpClass op_class)
{
@@ -662,9 +672,11 @@ InstructionQueue<Impl>::processFUCompletion(DynInstPtr &inst, int fu_idx)
// @todo: This could break if there's multiple multi-cycle ops
// finishing on this cycle. Maybe implement something like
// instToCommit in iew_impl.hh.
- int &size = issueToExecuteQueue->access(0)->size;
+ issueToExecuteQueue->access(0)->size++;
+ instsToExecute.push_back(inst);
+// int &size = issueToExecuteQueue->access(0)->size;
- issueToExecuteQueue->access(0)->insts[size++] = inst;
+// issueToExecuteQueue->access(0)->insts[size++] = inst;
}
// @todo: Figure out a better way to remove the squashed items from the
@@ -690,9 +702,8 @@ InstructionQueue<Impl>::scheduleReadyInsts()
ListOrderIt order_it = listOrder.begin();
ListOrderIt order_end_it = listOrder.end();
int total_issued = 0;
- int exec_queue_slot = i2e_info->size;
- while (exec_queue_slot < totalWidth && total_issued < totalWidth &&
+ while (total_issued < totalWidth &&
order_it != order_end_it) {
OpClass op_class = (*order_it).queueType;
@@ -733,8 +744,9 @@ InstructionQueue<Impl>::scheduleReadyInsts()
if (idx == -2 || idx != -1) {
if (op_latency == 1) {
- i2e_info->insts[exec_queue_slot++] = issuing_inst;
+// i2e_info->insts[exec_queue_slot++] = issuing_inst;
i2e_info->size++;
+ instsToExecute.push_back(issuing_inst);
// Add the FU onto the list of FU's to be freed next
// cycle if we used one.