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author | Ali Saidi <saidi@eecs.umich.edu> | 2006-02-23 14:50:16 -0500 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2006-02-23 14:50:16 -0500 |
commit | 1166d4f0bfe67a9dc178be3454b4f0eac38663ad (patch) | |
tree | 47e40edc5f2fdc70187bc32ceba9591931a066dd /cpu/o3/rob.hh | |
parent | 7b42d61f13e16afb3b9191f7c7510ebf4c72fd08 (diff) | |
download | gem5-1166d4f0bfe67a9dc178be3454b4f0eac38663ad.tar.xz |
Get rid of the xc from the alphaAccess/alphaConsole backdoor device.
Now allocate an array of stacks indexed by cpu number which specify
cpu stacks and are initialized by cpu 0. Othe cpus spin waiting for
their stacks before continuing. This change *REQUIRES* a the new
console code to operate correctly.
arch/alpha/ev5.cc:
Add cpuId to initCPU/initIPR functions
cpu/o3/cpu.cc:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
Move the cpu initilization into an init() function since it now needs
the CPU id which isn't known at construction
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
instead of the bootstrap variables, add space for 64 cpu stacks in the
alpha access structure.
sim/system.cc:
start all cpus immediately rather than just the first one
--HG--
extra : convert_revision : 28c218af49d885a0f203ada419f16f25d5a3f37b
Diffstat (limited to 'cpu/o3/rob.hh')
0 files changed, 0 insertions, 0 deletions