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authorKevin Lim <ktlim@umich.edu>2006-03-07 22:24:37 -0500
committerKevin Lim <ktlim@umich.edu>2006-03-07 22:24:37 -0500
commit556d069e77f1b6dffa4e4ece7aa86ab462ab8f4f (patch)
treeb06cce59a1ff9fe646a1fc693eba2f6cc6e229d9 /cpu/o3
parent6a42e3653f46aa4c4cf091b2fb176f2e6667e3cc (diff)
downloadgem5-556d069e77f1b6dffa4e4ece7aa86ab462ab8f4f.tar.xz
Fixes for accesses to the misc regs.
--HG-- extra : convert_revision : 47c7d90be5a147cb644f11980adcf8165b0ab3bb
Diffstat (limited to 'cpu/o3')
-rw-r--r--cpu/o3/alpha_cpu_impl.hh32
1 files changed, 20 insertions, 12 deletions
diff --git a/cpu/o3/alpha_cpu_impl.hh b/cpu/o3/alpha_cpu_impl.hh
index 33e363d4f..30ef4bd43 100644
--- a/cpu/o3/alpha_cpu_impl.hh
+++ b/cpu/o3/alpha_cpu_impl.hh
@@ -179,12 +179,16 @@ AlphaFullCPU<Impl>::copyToXC()
this->cpuXC->setFloatRegInt(i,
this->regFile.readFloatRegInt(renamed_reg));
}
-/*
- this->cpuXC->regs.miscRegs.fpcr = this->regFile.miscRegs.fpcr;
- this->cpuXC->regs.miscRegs.uniq = this->regFile.miscRegs.uniq;
- this->cpuXC->regs.miscRegs.lock_flag = this->regFile.miscRegs.lock_flag;
- this->cpuXC->regs.miscRegs.lock_addr = this->regFile.miscRegs.lock_addr;
-*/
+
+ this->cpuXC->setMiscReg(AlphaISA::Fpcr_DepTag,
+ this->regFile.readMiscReg(AlphaISA::Fpcr_DepTag));
+ this->cpuXC->setMiscReg(AlphaISA::Uniq_DepTag,
+ this->regFile.readMiscReg(AlphaISA::Uniq_DepTag));
+ this->cpuXC->setMiscReg(AlphaISA::Lock_Flag_DepTag,
+ this->regFile.readMiscReg(AlphaISA::Lock_Flag_DepTag));
+ this->cpuXC->setMiscReg(AlphaISA::Lock_Addr_DepTag,
+ this->regFile.readMiscReg(AlphaISA::Lock_Addr_DepTag));
+
this->cpuXC->setPC(this->rob.readHeadPC());
this->cpuXC->setNextPC(this->cpuXC->readPC()+4);
@@ -223,13 +227,17 @@ AlphaFullCPU<Impl>::copyFromXC()
this->regFile.setFloatRegInt(renamed_reg,
this->cpuXC->readFloatRegInt(i));
}
- /*
+
// Then loop through the misc registers.
- this->regFile.miscRegs.fpcr = this->cpuXC->regs.miscRegs.fpcr;
- this->regFile.miscRegs.uniq = this->cpuXC->regs.miscRegs.uniq;
- this->regFile.miscRegs.lock_flag = this->cpuXC->regs.miscRegs.lock_flag;
- this->regFile.miscRegs.lock_addr = this->cpuXC->regs.miscRegs.lock_addr;
- */
+ this->regFile.setMiscReg(AlphaISA::Fpcr_DepTag,
+ this->cpuXC->readMiscReg(AlphaISA::Fpcr_DepTag));
+ this->regFile.setMiscReg(AlphaISA::Uniq_DepTag,
+ this->cpuXC->readMiscReg(AlphaISA::Uniq_DepTag));
+ this->regFile.setMiscReg(AlphaISA::Lock_Flag_DepTag,
+ this->cpuXC->readMiscReg(AlphaISA::Lock_Flag_DepTag));
+ this->regFile.setMiscReg(AlphaISA::Lock_Addr_DepTag,
+ this->cpuXC->readMiscReg(AlphaISA::Lock_Addr_DepTag));
+
// Then finally set the PC and the next PC.
// regFile.pc = cpuXC->regs.pc;
// regFile.npc = cpuXC->regs.npc;