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author | Gabe Black <gblack@eecs.umich.edu> | 2006-03-14 16:08:32 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-03-14 16:08:32 -0500 |
commit | fa763d2ecfae16e84a9f9d689d19f746d84d08e3 (patch) | |
tree | 52474edfd8d1ab010a376b1eb66f4d9990fe4a54 /cpu/ozone/cpu.hh | |
parent | f045b110cf1db6f9fc70589532b48d9cca339897 (diff) | |
parent | efe46430fac2419a02062e3b282324498a55df28 (diff) | |
download | gem5-fa763d2ecfae16e84a9f9d689d19f746d84d08e3.tar.xz |
Merge m5.eecs.umich.edu:/bk/newmem
into ewok.(none):/home/gblack/m5/newmem
cpu/cpu_exec_context.cc:
Hand merge
--HG--
rename : arch/alpha/registerfile.hh => arch/alpha/regfile.hh
extra : convert_revision : bd18966f7c37c67c2bc7ca2633b58f70ce64409c
Diffstat (limited to 'cpu/ozone/cpu.hh')
-rw-r--r-- | cpu/ozone/cpu.hh | 36 |
1 files changed, 24 insertions, 12 deletions
diff --git a/cpu/ozone/cpu.hh b/cpu/ozone/cpu.hh index f5d84d656..fa849bb09 100644 --- a/cpu/ozone/cpu.hh +++ b/cpu/ozone/cpu.hh @@ -406,22 +406,28 @@ class OoOCPU : public BaseCPU return xc->readIntReg(si->srcRegIdx(idx)); } - float readFloatRegSingle(StaticInst *si, int idx) + FloatReg readFloatReg(StaticInst *si, int idx, width) { int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag; - return xc->readFloatRegSingle(reg_idx); + return xc->readFloatReg(reg_idx, width); } - double readFloatRegDouble(StaticInst *si, int idx) + FloatReg readFloatReg(StaticInst *si, int idx) { int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag; - return xc->readFloatRegDouble(reg_idx); + return xc->readFloatReg(reg_idx); } - uint64_t readFloatRegInt(StaticInst *si, int idx) + FloatRegBits readFloatRegBits(StaticInst *si, int idx, int width) { int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag; - return xc->readFloatRegInt(reg_idx); + return xc->readFloatRegBits(reg_idx, width); + } + + FloatRegBits readFloatRegBits(StaticInst *si, int idx) + { + int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag; + return xc->readFloatRegBits(reg_idx); } void setIntReg(StaticInst *si, int idx, uint64_t val) @@ -429,22 +435,28 @@ class OoOCPU : public BaseCPU xc->setIntReg(si->destRegIdx(idx), val); } - void setFloatRegSingle(StaticInst *si, int idx, float val) + void setFloatReg(StaticInst *si, int idx, FloatReg val, int width) + { + int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag; + xc->setFloatReg(reg_idx, val, width); + } + + void setFloatReg(StaticInst *si, int idx, FloatReg val) { int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag; - xc->setFloatRegSingle(reg_idx, val); + xc->setFloatReg(reg_idx, val); } - void setFloatRegDouble(StaticInst *si, int idx, double val) + void setFloatRegBits(StaticInst *si, int idx, FloatRegBits val, int width) { int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag; - xc->setFloatRegDouble(reg_idx, val); + xc->setFloatRegBits(reg_idx, val, width); } - void setFloatRegInt(StaticInst *si, int idx, uint64_t val) + void setFloatRegBits(StaticInst *si, int idx, FloatRegBits val) { int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag; - xc->setFloatRegInt(reg_idx, val); + xc->setFloatRegBits(reg_idx, val); } uint64_t readPC() { return PC; } |