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| author | Kevin Lim <ktlim@umich.edu> | 2006-04-24 17:10:06 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-04-24 17:10:06 -0400 |
| commit | e704960c80033dd008907caa7c24742a1020d302 (patch) | |
| tree | 9a1b231394df98bbe1f16a3e0812219ed07bb0d1 /cpu/ozone/lw_lsq_impl.hh | |
| parent | 676afbe2c729575f3468d4ae0aad31c5ac382ab8 (diff) | |
| download | gem5-e704960c80033dd008907caa7c24742a1020d302.tar.xz | |
Updates to Ozone model for quiesce, store conditionals.
--HG--
extra : convert_revision : 72ddd75ad0b5783aca9484e7d178c2915ee8e355
Diffstat (limited to 'cpu/ozone/lw_lsq_impl.hh')
| -rw-r--r-- | cpu/ozone/lw_lsq_impl.hh | 32 |
1 files changed, 27 insertions, 5 deletions
diff --git a/cpu/ozone/lw_lsq_impl.hh b/cpu/ozone/lw_lsq_impl.hh index 54d7ead6c..7b22d2564 100644 --- a/cpu/ozone/lw_lsq_impl.hh +++ b/cpu/ozone/lw_lsq_impl.hh @@ -131,7 +131,7 @@ OzoneLWLSQ<Impl>::clearSQ() { storeQueue.clear(); } - +/* template<class Impl> void OzoneLWLSQ<Impl>::setPageTable(PageTable *pt_ptr) @@ -139,7 +139,7 @@ OzoneLWLSQ<Impl>::setPageTable(PageTable *pt_ptr) DPRINTF(OzoneLSQ, "Setting the page table pointer.\n"); pTable = pt_ptr; } - +*/ template<class Impl> void OzoneLWLSQ<Impl>::resizeLQ(unsigned size) @@ -519,6 +519,23 @@ OzoneLWLSQ<Impl>::writebackStores() req->paddr, *(req->data), inst->seqNum); + switch((*sq_it).size) { + case 1: + cpu->write(req, (uint8_t &)(*sq_it).data); + break; + case 2: + cpu->write(req, (uint16_t &)(*sq_it).data); + break; + case 4: + cpu->write(req, (uint32_t &)(*sq_it).data); + break; + case 8: + cpu->write(req, (uint64_t &)(*sq_it).data); + break; + default: + panic("Unexpected store size!\n"); + } + if (dcacheInterface) { MemAccessResult result = dcacheInterface->access(req); @@ -538,7 +555,7 @@ OzoneLWLSQ<Impl>::writebackStores() typename BackEnd::LdWritebackEvent *wb = NULL; if (req->flags & LOCKED) { // Stx_C does not generate a system port transaction. - req->result=1; +// req->result=1; wb = new typename BackEnd::LdWritebackEvent(inst, be); } @@ -571,12 +588,12 @@ OzoneLWLSQ<Impl>::writebackStores() if (req->flags & LOCKED) { // Stx_C does not generate a system port transaction. - if (req->flags & UNCACHEABLE) { +/* if (req->flags & UNCACHEABLE) { req->result = 2; } else { req->result = 1; } - +*/ typename BackEnd::LdWritebackEvent *wb = new typename BackEnd::LdWritebackEvent(inst, be); @@ -642,6 +659,11 @@ OzoneLWLSQ<Impl>::squash(const InstSeqNum &squashed_num) while (stores != 0 && (*sq_it).inst->seqNum > squashed_num) { assert(!storeQueue.empty()); + + if ((*sq_it).canWB) { + break; + } + // Clear the smart pointer to make sure it is decremented. DPRINTF(OzoneLSQ,"Store Instruction PC %#x idx:%i squashed [sn:%lli]\n", (*sq_it).inst->readPC(), (*sq_it).inst->sqIdx, |