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authorSteve Reinhardt <stever@eecs.umich.edu>2006-02-15 17:52:49 -0500
committerSteve Reinhardt <stever@eecs.umich.edu>2006-02-15 17:52:49 -0500
commitb8a2d1e5c78eac41125a0be0bc2b5d5fe4714684 (patch)
tree5d9fbf42459bc67d17cbfeaf36cda53a0068d308 /cpu/pc_event.hh
parent091e6b72cf9f6c81b44d1d871c34907ad2615e6c (diff)
downloadgem5-b8a2d1e5c78eac41125a0be0bc2b5d5fe4714684.tar.xz
More progress toward compiling... partly by
fixing things, partly by ignoring CPU models that don't currently compile. SConscript: Split sources for fast, simple, and o3 CPU models into separate source lists. For now none of these are included in the base source list, so you won't get any CPU models at all... but we still can't compile the other stuff so it's not an issue. Also get rid of obsolete encumbered/mem file. base/loader/aout_object.cc: base/loader/aout_object.hh: base/loader/ecoff_object.cc: base/loader/ecoff_object.hh: base/loader/elf_object.cc: base/loader/elf_object.hh: base/loader/object_file.hh: cpu/exec_context.cc: sim/process.cc: sim/system.cc: sim/system.hh: FunctionalMemory -> Memory cpu/pc_event.hh: Get rid of unused badpc. cpu/simple/cpu.cc: cpu/simple/cpu.hh: Move Port functions into .cc file. mem/port.hh: Make recvAddressRangesQuery panic by default instead of being abstract... do CPUs need to implement this? mem/request.hh: Add prefetch flags. sim/syscall_emul.hh: Start to fix... --HG-- extra : convert_revision : ece53b3855f20916caaa381598ac37e8c7adfba7
Diffstat (limited to 'cpu/pc_event.hh')
-rw-r--r--cpu/pc_event.hh5
1 files changed, 0 insertions, 5 deletions
diff --git a/cpu/pc_event.hh b/cpu/pc_event.hh
index 7fa3902cc..585aba0f1 100644
--- a/cpu/pc_event.hh
+++ b/cpu/pc_event.hh
@@ -31,17 +31,12 @@
#include <vector>
-#include "mem/mem_req.hh"
-
class ExecContext;
class PCEventQueue;
class PCEvent
{
protected:
- static const Addr badpc = MemReq::inval_addr;
-
- protected:
std::string description;
PCEventQueue *queue;
Addr evpc;