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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-05-18 22:32:21 -0400 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-05-18 22:32:21 -0400 |
| commit | 796fa429fef8b038278c4a020374149d8b5ef8eb (patch) | |
| tree | 878553b3b7fb002db8df2065cb0a38ea694aa528 /cpu/simple/atomic.cc | |
| parent | 381c4f6720d477bdf6d90dd2c09a54cd30b9ddd9 (diff) | |
| download | gem5-796fa429fef8b038278c4a020374149d8b5ef8eb.tar.xz | |
Change Packet parameters on Port methods from references to pointers.
--HG--
extra : convert_revision : 7193e70304d4cbe1e4cbe16ce0d8527b2754d066
Diffstat (limited to 'cpu/simple/atomic.cc')
| -rw-r--r-- | cpu/simple/atomic.cc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/cpu/simple/atomic.cc b/cpu/simple/atomic.cc index 35a69cd4a..c09f16ada 100644 --- a/cpu/simple/atomic.cc +++ b/cpu/simple/atomic.cc @@ -78,21 +78,21 @@ AtomicSimpleCPU::init() } bool -AtomicSimpleCPU::CpuPort::recvTiming(Packet &pkt) +AtomicSimpleCPU::CpuPort::recvTiming(Packet *pkt) { panic("AtomicSimpleCPU doesn't expect recvAtomic callback!"); return true; } Tick -AtomicSimpleCPU::CpuPort::recvAtomic(Packet &pkt) +AtomicSimpleCPU::CpuPort::recvAtomic(Packet *pkt) { panic("AtomicSimpleCPU doesn't expect recvAtomic callback!"); return curTick; } void -AtomicSimpleCPU::CpuPort::recvFunctional(Packet &pkt) +AtomicSimpleCPU::CpuPort::recvFunctional(Packet *pkt) { panic("AtomicSimpleCPU doesn't expect recvFunctional callback!"); } @@ -263,7 +263,7 @@ AtomicSimpleCPU::read(Addr addr, T &data, unsigned flags) data_read_pkt->addr = data_read_req->getPaddr(); data_read_pkt->size = sizeof(T); - dcache_complete = dcachePort.sendAtomic(*data_read_pkt); + dcache_complete = dcachePort.sendAtomic(data_read_pkt); dcache_access = true; assert(data_read_pkt->result == Success); @@ -345,7 +345,7 @@ AtomicSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) data_write_pkt->addr = data_write_req->getPaddr(); data_write_pkt->size = sizeof(T); - dcache_complete = dcachePort.sendAtomic(*data_write_pkt); + dcache_complete = dcachePort.sendAtomic(data_write_pkt); dcache_access = true; assert(data_write_pkt->result == Success); @@ -430,7 +430,7 @@ AtomicSimpleCPU::tick() Fault fault = setupFetchPacket(ifetch_pkt); if (fault == NoFault) { - Tick icache_complete = icachePort.sendAtomic(*ifetch_pkt); + Tick icache_complete = icachePort.sendAtomic(ifetch_pkt); // ifetch_req is initialized to read the instruction directly // into the CPU object's inst field. |