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author | Gabe Black <gblack@eecs.umich.edu> | 2006-03-10 16:26:31 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-03-10 16:26:31 -0500 |
commit | 68d7382cf37a3f765a7cc650fcef04fb1548fa39 (patch) | |
tree | df11fec7d7434ed60804bf367904215dfb45dfcc /cpu/simple/cpu.cc | |
parent | e3d96aa889680469be44bb9cd59d3db837cb4dc4 (diff) | |
download | gem5-68d7382cf37a3f765a7cc650fcef04fb1548fa39.tar.xz |
Eliminated TARGET_ALPHA, since THE_ISA provides the same function.
--HG--
extra : convert_revision : eb173a553b0782891e8b4a8e227bfb647390883a
Diffstat (limited to 'cpu/simple/cpu.cc')
-rw-r--r-- | cpu/simple/cpu.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc index 4ac8c845c..3fa84d499 100644 --- a/cpu/simple/cpu.cc +++ b/cpu/simple/cpu.cc @@ -941,9 +941,9 @@ SimpleCPU::tick() // maintain $r0 semantics cpuXC->setIntReg(ZeroReg, 0); -#ifdef TARGET_ALPHA +#if THE_ISA == ALPHA_ISA cpuXC->setFloatRegDouble(ZeroReg, 0.0); -#endif // TARGET_ALPHA +#endif // ALPHA_ISA if (status() == IcacheAccessComplete) { // We've already fetched an instruction and were stalled on an |