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authorGabe Black <gblack@eecs.umich.edu>2006-02-16 01:25:48 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-02-16 01:25:48 -0500
commitb161d2a731ec7d75bdeb896d1b89efcbb125a09f (patch)
treea1a92378afb4d05e8c9e2d047c1c9edbcc9e3447 /cpu/simple/cpu.hh
parent7f17f1f2df7dc7123448ec624a345ee7c0e996b5 (diff)
parent10c79efe556697ebbed74c82214b5505b405da5b (diff)
downloadgem5-b161d2a731ec7d75bdeb896d1b89efcbb125a09f.tar.xz
Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into ewok.(none):/home/gblack/m5/multiarch --HG-- extra : convert_revision : d8626acb2686e123ad0bb6cf94e85c992657470d
Diffstat (limited to 'cpu/simple/cpu.hh')
-rw-r--r--cpu/simple/cpu.hh16
1 files changed, 8 insertions, 8 deletions
diff --git a/cpu/simple/cpu.hh b/cpu/simple/cpu.hh
index 0f7251237..e7a447117 100644
--- a/cpu/simple/cpu.hh
+++ b/cpu/simple/cpu.hh
@@ -234,10 +234,10 @@ class SimpleCPU : public BaseCPU
virtual void unserialize(Checkpoint *cp, const std::string &section);
template <class T>
- Fault read(Addr addr, T &data, unsigned flags);
+ Fault * read(Addr addr, T &data, unsigned flags);
template <class T>
- Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
+ Fault * write(T data, Addr addr, unsigned flags, uint64_t *res);
// These functions are only used in CPU models that split
// effective address computation from the actual memory access.
@@ -254,9 +254,9 @@ class SimpleCPU : public BaseCPU
// need to do this...
}
- Fault copySrcTranslate(Addr src);
+ Fault * copySrcTranslate(Addr src);
- Fault copy(Addr dest);
+ Fault * copy(Addr dest);
// The register accessor methods provide the index of the
// instruction's operand (e.g., 0 or 1), not the architectural
@@ -325,13 +325,13 @@ class SimpleCPU : public BaseCPU
void setFpcr(uint64_t val) { xc->setFpcr(val); }
#if FULL_SYSTEM
- uint64_t readIpr(int idx, Fault &fault) { return xc->readIpr(idx, fault); }
- Fault setIpr(int idx, uint64_t val) { return xc->setIpr(idx, val); }
- Fault hwrei() { return xc->hwrei(); }
+ uint64_t readIpr(int idx, Fault * &fault) { return xc->readIpr(idx, fault); }
+ Fault * setIpr(int idx, uint64_t val) { return xc->setIpr(idx, val); }
+ Fault * hwrei() { return xc->hwrei(); }
int readIntrFlag() { return xc->readIntrFlag(); }
void setIntrFlag(int val) { xc->setIntrFlag(val); }
bool inPalMode() { return xc->inPalMode(); }
- void ev5_trap(Fault fault) { xc->ev5_trap(fault); }
+ void ev5_trap(Fault * fault) { xc->ev5_trap(fault); }
bool simPalCheck(int palFunc) { return xc->simPalCheck(palFunc); }
#else
void syscall() { xc->syscall(); }