Adding some definitons for read/write blob/string. I need to locate te code stever wrote to break up address ranges into blk/page size chunks.

cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Add read/write blob definitions, still need to break it up into blk size chunks (where was the code stever wrote for that?)
mem/physical.hh:
    Remove un-needed function (I think)
mem/port.hh:
    Default these virtual functions to panic unimplented
mem/translating_port.cc:
    Again handling read/write string properly.

    Need the stever code to break things into page size chunks yet
mem/translating_port.hh:
    Having trouble with the const declerator.  I will need to read how it works, for now it compiles if I remove it.

--HG--
extra : convert_revision : f174e06700daa9967958d18e01798270c90d6dac

2 files changed, 20 insertions, 1 deletions

diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc
index 4937e5deb..02673119a 100644
--- a/cpu/simple/cpu.cc
+++ b/cpu/simple/cpu.cc
@@ -127,8 +127,23 @@ SimpleCPU::CpuPort::recvRetry()
     return cpu->processRetry();
 }
 
+void
+SimpleCPU::CpuPort::writeBlobFunctional(Addr addr, uint8_t *p, int size)
+{
+    int blksize = sendBlockSizeQuery();
+    //Use Stever's break it inot block size chunk code
+    //then send functional
+    blksize |= blksize;
+}
 
-
+void
+SimpleCPU::CpuPort::readBlobFunctional(Addr addr, uint8_t *p, int size)
+{
+    int blksize = sendBlockSizeQuery();
+    //Use Stever's break it inot block size chunk code
+    //then send functional
+    blksize |= blksize;
+}
 
 SimpleCPU::SimpleCPU(Params *p)
     : BaseCPU(p), icachePort(this),
diff --git a/cpu/simple/cpu.hh b/cpu/simple/cpu.hh
index 6df553fe2..94f6f190a 100644
--- a/cpu/simple/cpu.hh
+++ b/cpu/simple/cpu.hh
@@ -88,6 +88,10 @@ class SimpleCPU : public BaseCPU
         virtual void recvStatusChange(Status status);
 
         virtual Packet *recvRetry();
+
+        virtual void readBlobFunctional(Addr addr, uint8_t *p, int size);
+
+        virtual void writeBlobFunctional(Addr addr, uint8_t *p, int size);
     };
 
     CpuPort icachePort;