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| author | Kevin Lim <ktlim@umich.edu> | 2006-03-30 10:42:55 -0500 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-03-30 10:42:55 -0500 |
| commit | 0b2deb2a8897fa857d2b3e1936401c6666fdc728 (patch) | |
| tree | b4da42277ec3213472f5e2466e26a6966da74e50 /cpu/simple | |
| parent | 2ad1db3fde4f95eaf0b1be77910de0feb2185712 (diff) | |
| download | gem5-0b2deb2a8897fa857d2b3e1936401c6666fdc728.tar.xz | |
Fixes for full system compiling.
arch/alpha/arguments.cc:
There will not be a phys mem ptr in the XC in the newmem. This read will have to go through something else.
arch/alpha/ev5.cc:
Remove instantiations of these functions for the FastCPU, as the FastCPU is not really used. Also this messed up the ability to specify which CPU models are being built.
cpu/exec_context.hh:
Remove getPhysMemPtr() function.
cpu/exetrace.cc:
Include sim/system.hh, and sort the includes.
cpu/simple/cpu.cc:
Fixes for full system compilation.
kern/system_events.cc:
Remove include of encumbered FullCPU. The branch prediction will need to be fixed up in a more generic way in the future.
--HG--
extra : convert_revision : a8bbf562a277aa80e8f40112570c0a825298a05c
Diffstat (limited to 'cpu/simple')
| -rw-r--r-- | cpu/simple/cpu.cc | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc index 8a9e41d53..3d37f970f 100644 --- a/cpu/simple/cpu.cc +++ b/cpu/simple/cpu.cc @@ -64,8 +64,8 @@ #if FULL_SYSTEM #include "base/remote_gdb.hh" -#include "mem/functional/memory_control.hh" -#include "mem/functional/physical.hh" +//#include "mem/functional/memory_control.hh" +//#include "mem/functional/physical.hh" #include "sim/system.hh" #include "arch/tlb.hh" #include "arch/stacktrace.hh" @@ -155,13 +155,18 @@ SimpleCPU::CpuPort::recvRetry() } SimpleCPU::SimpleCPU(Params *p) +#if !FULL_SYSTEM : BaseCPU(p), mem(p->mem), icachePort(this), dcachePort(this), tickEvent(this, p->width), cpuXC(NULL) +#else + : BaseCPU(p), icachePort(this), dcachePort(this), + tickEvent(this, p->width), cpuXC(NULL) +#endif { _status = Idle; #if FULL_SYSTEM - cpuXC = new CPUExecContext(this, 0, p->system, p->itb, p->dtb, p->mem); + cpuXC = new CPUExecContext(this, 0, p->system, p->itb, p->dtb); #else cpuXC = new CPUExecContext(this, /* thread_num */ 0, p->process, /* asid */ 0, &dcachePort); @@ -899,7 +904,7 @@ SimpleCPU::tick() #if FULL_SYSTEM if (checkInterrupts && check_interrupts() && !cpuXC->inPalMode() && - status() != IcacheMissComplete) { + status() != IcacheAccessComplete) { int ipl = 0; int summary = 0; checkInterrupts = false; |