summaryrefslogtreecommitdiff
path: root/cpu/simple
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2006-03-01 05:26:08 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-03-01 05:26:08 -0500
commit2eff368dd03c93a503e13ab82cf4c4abb0c06aa9 (patch)
treeb00065517fbbe2d95b913c2ff3d8f160e69ffc9e /cpu/simple
parent1cfc27742448ab0e364d2f7ffc7460d90714a6d2 (diff)
downloadgem5-2eff368dd03c93a503e13ab82cf4c4abb0c06aa9.tar.xz
Cleaned up some of the Fault system.
arch/alpha/ev5.cc: Commented out the intr_post function since it's not used. If this really -is- needed, it should be moved into the fault class. arch/alpha/faults.cc: arch/alpha/faults.hh: Moved the fault invocation code into the fault class fully, and got rid of the need for isA. cpu/exec_context.cc: cpu/exec_context.hh: Removed the trap function from the ExecContext. The faults will execute normally in full system mode, but always panic in syscall emulation mode. cpu/ozone/cpu.hh: cpu/simple/cpu.hh: Changed the execution context executing a fault to a fault executing on the execution context. sim/faults.cc: If not in full system mode, trying to invoke a fault causes a panic. sim/faults.hh: Removed the isA function. --HG-- extra : convert_revision : 894dc8f0755c8efc4b7ef5a09fb2cf7373042395
Diffstat (limited to 'cpu/simple')
-rw-r--r--cpu/simple/cpu.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/simple/cpu.hh b/cpu/simple/cpu.hh
index 8396937a8..0b8d84e53 100644
--- a/cpu/simple/cpu.hh
+++ b/cpu/simple/cpu.hh
@@ -347,7 +347,7 @@ class SimpleCPU : public BaseCPU
int readIntrFlag() { return xc->readIntrFlag(); }
void setIntrFlag(int val) { xc->setIntrFlag(val); }
bool inPalMode() { return xc->inPalMode(); }
- void ev5_trap(Fault fault) { fault->invoke(xc); }
+ void trap(Fault fault) { fault->invoke(xc); }
bool simPalCheck(int palFunc) { return xc->simPalCheck(palFunc); }
#else
void syscall() { xc->syscall(); }