Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old Fault class renamed.

--HG--
extra : convert_revision : 5b2f457401f8ff94fe39fe071288eb117814b7bb

2 files changed, 32 insertions, 32 deletions

diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc
index c3f256de9..f7a6d2c21 100644
--- a/cpu/simple/cpu.cc
+++ b/cpu/simple/cpu.cc
@@ -312,7 +312,7 @@ change_thread_state(int thread_number, int activate, int priority)
 {
 }
 
-Fault *
+Fault
 SimpleCPU::copySrcTranslate(Addr src)
 {
     static bool no_warn = true;
@@ -332,7 +332,7 @@ SimpleCPU::copySrcTranslate(Addr src)
     memReq->reset(src & ~(blk_size - 1), blk_size);
 
     // translate to physical address
-    Fault * fault = xc->translateDataReadReq(memReq);
+    Fault fault = xc->translateDataReadReq(memReq);
 
     assert(fault != AlignmentFault);
 
@@ -346,7 +346,7 @@ SimpleCPU::copySrcTranslate(Addr src)
     return fault;
 }
 
-Fault *
+Fault
 SimpleCPU::copy(Addr dest)
 {
     static bool no_warn = true;
@@ -367,7 +367,7 @@ SimpleCPU::copy(Addr dest)
 
     memReq->reset(dest & ~(blk_size -1), blk_size);
     // translate to physical address
-    Fault * fault = xc->translateDataWriteReq(memReq);
+    Fault fault = xc->translateDataWriteReq(memReq);
 
     assert(fault != AlignmentFault);
 
@@ -394,11 +394,11 @@ SimpleCPU::copy(Addr dest)
 
 // precise architected memory state accessor macros
 template <class T>
-Fault *
+Fault
 SimpleCPU::read(Addr addr, T &data, unsigned flags)
 {
     if (status() == DcacheMissStall || status() == DcacheMissSwitch) {
-        Fault * fault = xc->read(memReq,data);
+        Fault fault = xc->read(memReq,data);
 
         if (traceData) {
             traceData->setAddr(addr);
@@ -409,7 +409,7 @@ SimpleCPU::read(Addr addr, T &data, unsigned flags)
     memReq->reset(addr, sizeof(T), flags);
 
     // translate to physical address
-    Fault * fault = xc->translateDataReadReq(memReq);
+    Fault fault = xc->translateDataReadReq(memReq);
 
     // if we have a cache, do cache access too
     if (fault == NoFault && dcacheInterface) {
@@ -447,32 +447,32 @@ SimpleCPU::read(Addr addr, T &data, unsigned flags)
 #ifndef DOXYGEN_SHOULD_SKIP_THIS
 
 template
-Fault *
+Fault
 SimpleCPU::read(Addr addr, uint64_t &data, unsigned flags);
 
 template
-Fault *
+Fault
 SimpleCPU::read(Addr addr, uint32_t &data, unsigned flags);
 
 template
-Fault *
+Fault
 SimpleCPU::read(Addr addr, uint16_t &data, unsigned flags);
 
 template
-Fault *
+Fault
 SimpleCPU::read(Addr addr, uint8_t &data, unsigned flags);
 
 #endif //DOXYGEN_SHOULD_SKIP_THIS
 
 template<>
-Fault *
+Fault
 SimpleCPU::read(Addr addr, double &data, unsigned flags)
 {
     return read(addr, *(uint64_t*)&data, flags);
 }
 
 template<>
-Fault *
+Fault
 SimpleCPU::read(Addr addr, float &data, unsigned flags)
 {
     return read(addr, *(uint32_t*)&data, flags);
@@ -480,7 +480,7 @@ SimpleCPU::read(Addr addr, float &data, unsigned flags)
 
 
 template<>
-Fault *
+Fault
 SimpleCPU::read(Addr addr, int32_t &data, unsigned flags)
 {
     return read(addr, (uint32_t&)data, flags);
@@ -488,13 +488,13 @@ SimpleCPU::read(Addr addr, int32_t &data, unsigned flags)
 
 
 template <class T>
-Fault *
+Fault
 SimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
 {
     memReq->reset(addr, sizeof(T), flags);
 
     // translate to physical address
-    Fault * fault = xc->translateDataWriteReq(memReq);
+    Fault fault = xc->translateDataWriteReq(memReq);
 
     // do functional access
     if (fault == NoFault)
@@ -531,32 +531,32 @@ SimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
 
 #ifndef DOXYGEN_SHOULD_SKIP_THIS
 template
-Fault *
+Fault
 SimpleCPU::write(uint64_t data, Addr addr, unsigned flags, uint64_t *res);
 
 template
-Fault *
+Fault
 SimpleCPU::write(uint32_t data, Addr addr, unsigned flags, uint64_t *res);
 
 template
-Fault *
+Fault
 SimpleCPU::write(uint16_t data, Addr addr, unsigned flags, uint64_t *res);
 
 template
-Fault *
+Fault
 SimpleCPU::write(uint8_t data, Addr addr, unsigned flags, uint64_t *res);
 
 #endif //DOXYGEN_SHOULD_SKIP_THIS
 
 template<>
-Fault *
+Fault
 SimpleCPU::write(double data, Addr addr, unsigned flags, uint64_t *res)
 {
     return write(*(uint64_t*)&data, addr, flags, res);
 }
 
 template<>
-Fault *
+Fault
 SimpleCPU::write(float data, Addr addr, unsigned flags, uint64_t *res)
 {
     return write(*(uint32_t*)&data, addr, flags, res);
@@ -564,7 +564,7 @@ SimpleCPU::write(float data, Addr addr, unsigned flags, uint64_t *res)
 
 
 template<>
-Fault *
+Fault
 SimpleCPU::write(int32_t data, Addr addr, unsigned flags, uint64_t *res)
 {
     return write((uint32_t)data, addr, flags, res);
@@ -638,7 +638,7 @@ SimpleCPU::tick()
 
     traceData = NULL;
 
-    Fault * fault = NoFault;
+    Fault fault = NoFault;
 
 #if FULL_SYSTEM
     if (checkInterrupts && check_interrupts() && !xc->inPalMode() &&
diff --git a/cpu/simple/cpu.hh b/cpu/simple/cpu.hh
index 8a3900726..d3e0323b6 100644
--- a/cpu/simple/cpu.hh
+++ b/cpu/simple/cpu.hh
@@ -236,10 +236,10 @@ class SimpleCPU : public BaseCPU
     virtual void unserialize(Checkpoint *cp, const std::string &section);
 
     template <class T>
-    Fault * read(Addr addr, T &data, unsigned flags);
+    Fault read(Addr addr, T &data, unsigned flags);
 
     template <class T>
-    Fault * write(T data, Addr addr, unsigned flags, uint64_t *res);
+    Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
 
     // These functions are only used in CPU models that split
     // effective address computation from the actual memory access.
@@ -256,9 +256,9 @@ class SimpleCPU : public BaseCPU
         // need to do this...
     }
 
-    Fault * copySrcTranslate(Addr src);
+    Fault copySrcTranslate(Addr src);
 
-    Fault * copy(Addr dest);
+    Fault copy(Addr dest);
 
     // The register accessor methods provide the index of the
     // instruction's operand (e.g., 0 or 1), not the architectural
@@ -327,13 +327,13 @@ class SimpleCPU : public BaseCPU
     void setFpcr(uint64_t val) { xc->setFpcr(val); }
 
 #if FULL_SYSTEM
-    uint64_t readIpr(int idx, Fault * &fault) { return xc->readIpr(idx, fault); }
-    Fault * setIpr(int idx, uint64_t val) { return xc->setIpr(idx, val); }
-    Fault * hwrei() { return xc->hwrei(); }
+    uint64_t readIpr(int idx, Fault &fault) { return xc->readIpr(idx, fault); }
+    Fault setIpr(int idx, uint64_t val) { return xc->setIpr(idx, val); }
+    Fault hwrei() { return xc->hwrei(); }
     int readIntrFlag() { return xc->readIntrFlag(); }
     void setIntrFlag(int val) { xc->setIntrFlag(val); }
     bool inPalMode() { return xc->inPalMode(); }
-    void ev5_trap(Fault * fault) { xc->ev5_trap(fault); }
+    void ev5_trap(Fault fault) { xc->ev5_trap(fault); }
     bool simPalCheck(int palFunc) { return xc->simPalCheck(palFunc); }
 #else
     void syscall() { xc->syscall(); }