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| author | Nathan Binkert <binkertn@umich.edu> | 2004-11-10 18:37:19 -0500 |
|---|---|---|
| committer | Nathan Binkert <binkertn@umich.edu> | 2004-11-10 18:37:19 -0500 |
| commit | 4328480b5602decbcc7239e1884324ce23eaa3ec (patch) | |
| tree | cdc6f1676b0a4faba383af8a2928c49101932ac7 /cpu/simple_cpu/simple_cpu.cc | |
| parent | 4524eb0b2857b78329f8dd75c84cf89b63359c57 (diff) | |
| download | gem5-4328480b5602decbcc7239e1884324ce23eaa3ec.tar.xz | |
Don't use the global check_interrupts variable. Add a per-cpu
checkInterrupts variable and use that to determine whether an interrupt
can occur on a given cycle.
arch/alpha/ev5.cc:
XC -> CPU (and xc -> CPU) since we're really talking about a CPU here
Don't use the global check_interrupts variable. Add a per-cpu
checkInterrupts variable and use that to determine whether an interrupt
can occur on a given cycle.
--HG--
extra : convert_revision : be4c0247e5834005c60a45796a222cffd327b64e
Diffstat (limited to 'cpu/simple_cpu/simple_cpu.cc')
| -rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 6af67eee0..04783574f 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -641,13 +641,11 @@ SimpleCPU::tick() Fault fault = No_Fault; #ifdef FULL_SYSTEM - if (AlphaISA::check_interrupts && - xc->cpu->check_interrupts() && - !PC_PAL(xc->regs.pc) && + if (checkInterrupts && check_interrupts() && !xc->inPalMode() && status() != IcacheMissComplete) { int ipl = 0; int summary = 0; - AlphaISA::check_interrupts = 0; + checkInterrupts = false; IntReg *ipr = xc->regs.ipr; if (xc->regs.ipr[TheISA::IPR_SIRR]) { |