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authorLisa Hsu <hsul@eecs.umich.edu>2004-02-24 14:59:25 -0500
committerLisa Hsu <hsul@eecs.umich.edu>2004-02-24 14:59:25 -0500
commit6a306d4cafae360c9107a845ee2d08c8667453ae (patch)
tree31bf04e6d17e8f42c04ff2aa1a1f46f88de4e1c9 /cpu/simple_cpu/simple_cpu.cc
parentf9c91277f356285b58c4e9a1c9c15248676ce9ab (diff)
downloadgem5-6a306d4cafae360c9107a845ee2d08c8667453ae.tar.xz
add in an init() callback for CPU's so that no stats are accessed prior to the end of the build process. (Done by doing the registerExecContext() calling sequence in the init() process rather than the create() process).
cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: same thing for simple cpu's. --HG-- extra : convert_revision : aac9f91742866fb26f8cace622f9b88454a69662
Diffstat (limited to 'cpu/simple_cpu/simple_cpu.cc')
-rw-r--r--cpu/simple_cpu/simple_cpu.cc23
1 files changed, 17 insertions, 6 deletions
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc
index d039890c7..721861dd5 100644
--- a/cpu/simple_cpu/simple_cpu.cc
+++ b/cpu/simple_cpu/simple_cpu.cc
@@ -120,7 +120,7 @@ SimpleCPU::SimpleCPU(const string &_name,
FunctionalMemory *mem,
MemInterface *icache_interface,
MemInterface *dcache_interface,
- Tick freq)
+ bool _def_reg, Tick freq)
: BaseCPU(_name, /* number_of_threads */ 1,
max_insts_any_thread, max_insts_all_threads,
max_loads_any_thread, max_loads_all_threads,
@@ -132,12 +132,14 @@ SimpleCPU::SimpleCPU(const string &_name, Process *_process,
Counter max_loads_any_thread,
Counter max_loads_all_threads,
MemInterface *icache_interface,
- MemInterface *dcache_interface)
+ MemInterface *dcache_interface,
+ bool _def_reg)
: BaseCPU(_name, /* number_of_threads */ 1,
max_insts_any_thread, max_insts_all_threads,
max_loads_any_thread, max_loads_all_threads),
#endif
- tickEvent(this), xc(NULL), cacheCompletionEvent(this)
+ tickEvent(this), xc(NULL), defer_registration(_def_reg),
+ cacheCompletionEvent(this)
{
_status = Idle;
#ifdef FULL_SYSTEM
@@ -171,6 +173,13 @@ SimpleCPU::~SimpleCPU()
{
}
+void SimpleCPU::init()
+{
+ if (!defer_registration) {
+ this->registerExecContexts();
+ }
+}
+
void
SimpleCPU::switchOut()
{
@@ -810,6 +819,7 @@ CREATE_SIM_OBJECT(SimpleCPU)
itb, dtb, mem,
(icache) ? icache->getInterface() : NULL,
(dcache) ? dcache->getInterface() : NULL,
+ defer_registration,
ticksPerSecond * mult);
#else
@@ -817,14 +827,15 @@ CREATE_SIM_OBJECT(SimpleCPU)
max_insts_any_thread, max_insts_all_threads,
max_loads_any_thread, max_loads_all_threads,
(icache) ? icache->getInterface() : NULL,
- (dcache) ? dcache->getInterface() : NULL);
+ (dcache) ? dcache->getInterface() : NULL,
+ defer_registration);
#endif // FULL_SYSTEM
-
+#if 0
if (!defer_registration) {
cpu->registerExecContexts();
}
-
+#endif
return cpu;
}