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authorErik Hallnor <ehallnor@umich.edu>2004-03-04 15:06:34 -0500
committerErik Hallnor <ehallnor@umich.edu>2004-03-04 15:06:34 -0500
commit8ad803058f5d1ba5653325b7f66df5e54d070a1e (patch)
tree5a742f77b1d8362eeb2a72775a189fe9dac20452 /cpu/simple_cpu/simple_cpu.cc
parentb91ea433b9921e07c39d53cec3d37a5fdc9353a9 (diff)
parent7c089b2001afb93fe51b1a89456b15fd0d00c794 (diff)
downloadgem5-8ad803058f5d1ba5653325b7f66df5e54d070a1e.tar.xz
Automerged
--HG-- extra : convert_revision : 7b56535ee32551f27db8d98172159f63e5099835
Diffstat (limited to 'cpu/simple_cpu/simple_cpu.cc')
-rw-r--r--cpu/simple_cpu/simple_cpu.cc40
1 files changed, 40 insertions, 0 deletions
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc
index c25a95775..c2796efd0 100644
--- a/cpu/simple_cpu/simple_cpu.cc
+++ b/cpu/simple_cpu/simple_cpu.cc
@@ -327,6 +327,46 @@ change_thread_state(int thread_number, int activate, int priority)
{
}
+Fault
+SimpleCPU::copySrcTranslate(Addr src)
+{
+ memReq->reset(src, (dcacheInterface) ?
+ dcacheInterface->getBlockSize()
+ : 64);
+
+ // translate to physical address
+ Fault fault = xc->translateDataReadReq(memReq);
+
+ if (fault == No_Fault) {
+ xc->copySrcAddr = src;
+ xc->copySrcPhysAddr = memReq->paddr;
+ } else {
+ xc->copySrcAddr = 0;
+ xc->copySrcPhysAddr = 0;
+ }
+ return fault;
+}
+
+Fault
+SimpleCPU::copy(Addr dest)
+{
+ int blk_size = (dcacheInterface) ? dcacheInterface->getBlockSize() : 64;
+ uint8_t data[blk_size];
+ assert(xc->copySrcPhysAddr);
+ memReq->reset(dest, blk_size);
+ // translate to physical address
+ Fault fault = xc->translateDataWriteReq(memReq);
+ if (fault == No_Fault) {
+ Addr dest_addr = memReq->paddr;
+ // Need to read straight from memory since we have more than 8 bytes.
+ memReq->paddr = xc->copySrcPhysAddr;
+ xc->mem->read(memReq, data);
+ memReq->paddr = dest_addr;
+ xc->mem->write(memReq, data);
+ }
+ return fault;
+}
+
// precise architected memory state accessor macros
template <class T>
Fault