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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2004-02-02 18:14:11 -0800 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2004-02-02 18:14:11 -0800 |
| commit | b79f6b3273057d99809aced133333552778fd055 (patch) | |
| tree | 4b0270ff2751e544984f5d8e6c79f52268e02f05 /cpu/simple_cpu/simple_cpu.cc | |
| parent | 548b4a1cb045c6675692e8ed7c6375ebb808c803 (diff) | |
| download | gem5-b79f6b3273057d99809aced133333552778fd055.tar.xz | |
insn->inst
--HG--
extra : convert_revision : fcc556fb7e65855ec3c04ef272177c8e7a38fff9
Diffstat (limited to 'cpu/simple_cpu/simple_cpu.cc')
| -rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index e9284ad31..2e4dff280 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -653,7 +653,7 @@ SimpleCPU::tick() numInst++; // check for instruction-count-based events - comInsnEventQueue[0]->serviceEvents(numInst); + comInstEventQueue[0]->serviceEvents(numInst); // decode the instruction StaticInstPtr<TheISA> si(inst); @@ -666,7 +666,7 @@ SimpleCPU::tick() xc->regs.ra = (inst >> 21) & 0x1f; #endif // FULL_SYSTEM - xc->func_exe_insn++; + xc->func_exe_inst++; fault = si->execute(this, xc, traceData); #ifdef FS_MEASURE @@ -770,10 +770,10 @@ END_DECLARE_SIM_OBJECT_PARAMS(SimpleCPU) BEGIN_INIT_SIM_OBJECT_PARAMS(SimpleCPU) INIT_PARAM_DFLT(max_insts_any_thread, - "terminate when any thread reaches this insn count", + "terminate when any thread reaches this inst count", 0), INIT_PARAM_DFLT(max_insts_all_threads, - "terminate when all threads have reached this insn count", + "terminate when all threads have reached this inst count", 0), INIT_PARAM_DFLT(max_loads_any_thread, "terminate when any thread reaches this load count", |