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author | Kevin Lim <ktlim@umich.edu> | 2005-04-14 16:06:34 -0400 |
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committer | Kevin Lim <ktlim@umich.edu> | 2005-04-14 16:06:34 -0400 |
commit | 26d6d97f5d46bfe2cc5734eb632bec0bc67aed19 (patch) | |
tree | ed8a33f234ee4d85bc79f6179ea8907976ee3e70 /cpu/simple_cpu/simple_cpu.cc | |
parent | dcedd7866e35adc1e0fbc081188b259ffc7bbdf5 (diff) | |
parent | 5e67b78af7f74d7223ced5b54978ca9fa29606c5 (diff) | |
download | gem5-26d6d97f5d46bfe2cc5734eb632bec0bc67aed19.tar.xz |
Merge ktlim@zizzer.eecs.umich.edu:/bk/m5
into zamp.eecs.umich.edu:/z/ktlim2/m5
--HG--
extra : convert_revision : 0baadd8d68bfa6f8e96307eb2d4426b0d9e0b8b4
Diffstat (limited to 'cpu/simple_cpu/simple_cpu.cc')
-rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 62bbb2fa8..06fee208d 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -806,7 +806,7 @@ SimpleCPU::tick() status() == DcacheMissStall); if (status() == Running && !tickEvent.scheduled()) - tickEvent.schedule(curTick + 1); + tickEvent.schedule(curTick + cycles(1)); } @@ -831,6 +831,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(SimpleCPU) SimObjectParam<Process *> workload; #endif // FULL_SYSTEM + Param<int> cycle_time; SimObjectParam<BaseMem *> icache; SimObjectParam<BaseMem *> dcache; @@ -862,6 +863,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(SimpleCPU) INIT_PARAM(workload, "processes to run"), #endif // FULL_SYSTEM + INIT_PARAM(cycle_time, "cpu cycle time"), INIT_PARAM(icache, "L1 instruction cache object"), INIT_PARAM(dcache, "L1 data cache object"), INIT_PARAM(defer_registration, "defer system registration (for sampling)"), @@ -887,7 +889,7 @@ CREATE_SIM_OBJECT(SimpleCPU) params->max_loads_any_thread = max_loads_any_thread; params->max_loads_all_threads = max_loads_all_threads; params->deferRegistration = defer_registration; - params->freq = ticksPerSecond; + params->cycleTime = cycle_time; params->functionTrace = function_trace; params->functionTraceStart = function_trace_start; params->icache_interface = (icache) ? icache->getInterface() : NULL; |